408 lines
25 KiB
C
408 lines
25 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_hal_adc_ex.h
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* @author MCD Application Team
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* @brief Header file of ADC HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_ADC_EX_H
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#define __STM32F4xx_ADC_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup ADCEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup ADCEx_Exported_Types ADC Exported Types
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* @{
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*/
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/**
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* @brief ADC Configuration injected Channel structure definition
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* @note Parameters of this structure are shared within 2 scopes:
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* - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
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* - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
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* AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
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* @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
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* ADC state can be either:
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* - For all parameters: ADC disabled
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* - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group.
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* - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group.
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*/
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typedef struct
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{
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uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
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This parameter can be a value of @ref ADC_channels
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Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
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uint32_t InjectedRank; /*!< Rank in the injected group sequencer
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This parameter must be a value of @ref ADCEx_injected_rank
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Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
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uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
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Unit: ADC clock cycles
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Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
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This parameter can be a value of @ref ADC_sampling_times
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Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
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If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
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Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
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sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
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Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
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uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
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Offset value must be a positive number.
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Depending of ADC resolution selected (12, 10, 8 or 6 bits),
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this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
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uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
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To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
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This parameter must be a number between Min_Data = 1 and Max_Data = 4.
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Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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configure a channel on injected group can impact the configuration of other channels previously set. */
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FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
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Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
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Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
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This parameter can be set to ENABLE or DISABLE.
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Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
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Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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configure a channel on injected group can impact the configuration of other channels previously set. */
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FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
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This parameter can be set to ENABLE or DISABLE.
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Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
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Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
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Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
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To maintain JAUTO always enabled, DMA must be configured in circular mode.
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Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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configure a channel on injected group can impact the configuration of other channels previously set. */
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uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
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If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
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If set to external trigger source, triggering is on event rising edge.
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This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected
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Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
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If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
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Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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configure a channel on injected group can impact the configuration of other channels previously set. */
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uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
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This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
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If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
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Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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configure a channel on injected group can impact the configuration of other channels previously set. */
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} ADC_InjectionConfTypeDef;
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/**
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* @brief ADC Configuration multi-mode structure definition
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*/
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typedef struct
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{
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uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
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This parameter can be a value of @ref ADCEx_Common_mode */
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uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
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This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
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uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
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This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
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} ADC_MultiModeTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup ADCEx_Exported_Constants ADC Exported Constants
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* @{
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*/
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/** @defgroup ADCEx_Common_mode ADC Common Mode
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* @{
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*/
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#define ADC_MODE_INDEPENDENT 0x00000000U
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#define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
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#define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
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#define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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#define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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#define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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#define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
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#define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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#define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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#define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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/**
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* @}
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*/
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/** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
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* @{
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*/
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#define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */
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#define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
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#define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
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#define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
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/**
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* @}
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*/
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/** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
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* @{
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*/
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#define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U
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#define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
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#define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
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#define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
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/**
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* @}
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*/
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/** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
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* @{
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*/
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#define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U
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#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
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#define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
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#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
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#define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
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#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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#define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
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#define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U)
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/**
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* @}
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*/
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/** @defgroup ADCEx_injected_rank ADC Injected Rank
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* @{
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*/
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#define ADC_INJECTED_RANK_1 0x00000001U
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#define ADC_INJECTED_RANK_2 0x00000002U
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#define ADC_INJECTED_RANK_3 0x00000003U
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#define ADC_INJECTED_RANK_4 0x00000004U
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/**
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* @}
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*/
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/** @defgroup ADCEx_channels ADC Specific Channels
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* @{
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*/
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#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
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defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
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defined(STM32F412Cx)
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#define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
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#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx ||
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STM32F412Vx || STM32F412Rx || STM32F412Cx */
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#if defined(STM32F411xE) || defined(STM32F413xx) || defined(STM32F423xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\
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defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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#define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT 0x10000000U /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
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#define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
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#endif /* STM32F411xE || STM32F413xx || STM32F423xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup ADC_Exported_Macros ADC Exported Macros
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* @{
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*/
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#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
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/**
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* @brief Disable internal path of ADC channel Vbat
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* @note Use case of this macro:
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* On devices STM32F42x and STM32F43x, ADC internal channels
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* Vbat and VrefInt share the same internal path, only
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* one of them can be enabled.This macro is to be used when ADC
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* channels Vbat and VrefInt are selected, and must be called
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* before starting conversion of ADC channel VrefInt in order
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* to disable ADC channel Vbat.
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* @retval None
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*/
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#define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE))
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#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup ADCEx_Exported_Functions
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* @{
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*/
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/** @addtogroup ADCEx_Exported_Functions_Group1
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* @{
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*/
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/* I/O operation functions ******************************************************/
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HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc);
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HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc);
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uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
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uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
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void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc);
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/* Peripheral Control functions *************************************************/
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HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected);
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HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup ADCEx_Private_Constants ADC Private Constants
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* @{
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup ADCEx_Private_Macros ADC Private Macros
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* @{
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*/
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#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
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defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
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defined(STM32F412Cx)
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#define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
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#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE ||
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STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
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#if defined(STM32F411xE) || defined(STM32F413xx) || defined(STM32F423xx) || defined(STM32F427xx) || \
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defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || \
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defined(STM32F469xx) || defined(STM32F479xx)
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#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
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((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
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#endif /* STM32F411xE || STM32F413xx || STM32F423xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
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((MODE) == ADC_DUALMODE_INJECSIMULT) || \
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((MODE) == ADC_DUALMODE_REGSIMULT) || \
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((MODE) == ADC_DUALMODE_INTERL) || \
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((MODE) == ADC_DUALMODE_ALTERTRIG) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
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((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
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((MODE) == ADC_TRIPLEMODE_INTERL) || \
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((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
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#define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
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((MODE) == ADC_DMAACCESSMODE_1) || \
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((MODE) == ADC_DMAACCESSMODE_2) || \
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((MODE) == ADC_DMAACCESSMODE_3))
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#define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
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((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
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#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
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((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
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((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
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#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
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#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= 4U))
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/**
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* @brief Set the selected injected Channel rank.
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* @param _CHANNELNB_ Channel number.
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* @param _RANKNB_ Rank number.
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* @param _JSQR_JL_ Sequence length.
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* @retval None
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*/
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#define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
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/**
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* @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1
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* if available (ADC2, ADC3 availability depends on STM32 product)
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* @param __HANDLE__ ADC handle
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* @retval Common control register ADC123 or ADC1
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*/
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#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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#define ADC_COMMON_REGISTER(__HANDLE__) ADC123_COMMON
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#else
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#define ADC_COMMON_REGISTER(__HANDLE__) ADC1_COMMON
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#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx || STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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/**
|
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* @}
|
|
*/
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|
|
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup ADCEx_Private_Functions ADC Private Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
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|
|
|
/**
|
|
* @}
|
|
*/
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|
|
|
#ifdef __cplusplus
|
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}
|
|
#endif
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#endif /*__STM32F4xx_ADC_EX_H */
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