170 lines
4.1 KiB
C
170 lines
4.1 KiB
C
/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_add_f16.c
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* Description: Floating-point vector addition
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*
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* $Date: 23 April 2021
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* $Revision: V1.9.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "dsp/basic_math_functions_f16.h"
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/**
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@ingroup groupMath
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*/
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/**
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@defgroup BasicAdd Vector Addition
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Element-by-element addition of two vectors.
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<pre>
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pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
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</pre>
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There are separate functions for floating-point, Q7, Q15, and Q31 data types.
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*/
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/**
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@addtogroup BasicAdd
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@{
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*/
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/**
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@brief Floating-point vector addition.
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@param[in] pSrcA points to first input vector
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@param[in] pSrcB points to second input vector
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@param[out] pDst points to output vector
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@param[in] blockSize number of samples in each vector
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@return none
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*/
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#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
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#include "arm_helium_utils.h"
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void arm_add_f16(
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const float16_t * pSrcA,
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const float16_t * pSrcB,
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float16_t * pDst,
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uint32_t blockSize)
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{
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uint32_t blkCnt; /* Loop counter */
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f16x8_t vec1;
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f16x8_t vec2;
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f16x8_t res;
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/* Compute 4 outputs at a time */
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blkCnt = blockSize >> 3U;
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while (blkCnt > 0U)
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{
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/* C = A + B */
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/* Add and then store the results in the destination buffer. */
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vec1 = vld1q(pSrcA);
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vec2 = vld1q(pSrcB);
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res = vaddq(vec1, vec2);
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vst1q(pDst, res);
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/* Increment pointers */
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pSrcA += 8;
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pSrcB += 8;
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pDst += 8;
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/* Decrement the loop counter */
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blkCnt--;
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}
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/* Tail */
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blkCnt = blockSize & 0x7;
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if (blkCnt > 0U)
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{
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/* C = A + B */
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mve_pred16_t p0 = vctp16q(blkCnt);
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vec1 = vld1q(pSrcA);
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vec2 = vld1q(pSrcB);
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vstrhq_p(pDst, vaddq(vec1,vec2), p0);
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}
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}
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#else
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#if defined(ARM_FLOAT16_SUPPORTED)
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void arm_add_f16(
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const float16_t * pSrcA,
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const float16_t * pSrcB,
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float16_t * pDst,
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uint32_t blockSize)
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{
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uint32_t blkCnt; /* Loop counter */
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#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
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/* Loop unrolling: Compute 4 outputs at a time */
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blkCnt = blockSize >> 2U;
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while (blkCnt > 0U)
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{
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/* C = A + B */
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/* Add and store result in destination buffer. */
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*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
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*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
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*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
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*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
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/* Decrement loop counter */
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blkCnt--;
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}
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/* Loop unrolling: Compute remaining outputs */
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blkCnt = blockSize % 0x4U;
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#else
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/* Initialize blkCnt with number of samples */
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blkCnt = blockSize;
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#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
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while (blkCnt > 0U)
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{
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/* C = A + B */
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/* Add and store result in destination buffer. */
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*pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
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/* Decrement loop counter */
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blkCnt--;
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}
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}
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#endif /* defined(ARM_FLOAT16_SUPPORTED) */
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#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
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/**
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@} end of BasicAdd group
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*/
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