331 lines
11 KiB
C
331 lines
11 KiB
C
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/**
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******************************************************************************
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* @file stm32f4xx_hal_nor.h
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* @author MCD Application Team
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* @brief Header file of NOR HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32F4xx_HAL_NOR_H
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#define STM32F4xx_HAL_NOR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(FMC_Bank1) || defined(FSMC_Bank1)
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/* Includes ------------------------------------------------------------------*/
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#if defined(FSMC_Bank1)
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#include "stm32f4xx_ll_fsmc.h"
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#else
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#include "stm32f4xx_ll_fmc.h"
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#endif /* FMC_Bank1 */
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup NOR
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* @{
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*/
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/* Exported typedef ----------------------------------------------------------*/
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/** @defgroup NOR_Exported_Types NOR Exported Types
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* @{
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*/
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/**
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* @brief HAL SRAM State structures definition
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*/
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typedef enum
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{
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HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
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HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
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HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
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HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
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HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
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} HAL_NOR_StateTypeDef;
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/**
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* @brief FMC NOR Status typedef
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*/
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typedef enum
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{
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HAL_NOR_STATUS_SUCCESS = 0U,
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HAL_NOR_STATUS_ONGOING,
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HAL_NOR_STATUS_ERROR,
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HAL_NOR_STATUS_TIMEOUT
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} HAL_NOR_StatusTypeDef;
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/**
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* @brief FMC NOR ID typedef
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*/
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typedef struct
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{
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uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
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uint16_t Device_Code1;
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uint16_t Device_Code2;
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uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
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These codes can be accessed by performing read operations with specific
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control signals and addresses set.They can also be accessed by issuing
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an Auto Select command */
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} NOR_IDTypeDef;
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/**
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* @brief FMC NOR CFI typedef
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*/
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typedef struct
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{
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/*!< Defines the information stored in the memory's Common flash interface
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which contains a description of various electrical and timing parameters,
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density information and functions supported by the memory */
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uint16_t CFI_1;
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uint16_t CFI_2;
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uint16_t CFI_3;
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uint16_t CFI_4;
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} NOR_CFITypeDef;
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/**
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* @brief NOR handle Structure definition
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*/
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#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
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typedef struct __NOR_HandleTypeDef
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#else
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typedef struct
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#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
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{
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FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
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FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
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FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
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HAL_LockTypeDef Lock; /*!< NOR locking object */
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__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
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uint32_t CommandSet; /*!< NOR algorithm command set and control */
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#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
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void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */
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void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */
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#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
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} NOR_HandleTypeDef;
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#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL NOR Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */
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HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */
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} HAL_NOR_CallbackIDTypeDef;
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/**
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* @brief HAL NOR Callback pointer definition
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*/
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typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
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#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup NOR_Exported_Macros NOR Exported Macros
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* @{
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*/
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/** @brief Reset NOR handle state
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* @param __HANDLE__ specifies the NOR handle.
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* @retval None
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*/
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#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
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#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \
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(__HANDLE__)->State = HAL_NOR_STATE_RESET; \
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(__HANDLE__)->MspInitCallback = NULL; \
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(__HANDLE__)->MspDeInitCallback = NULL; \
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} while(0)
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#else
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#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
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#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup NOR_Exported_Functions NOR Exported Functions
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* @{
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*/
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/** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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/* Initialization/de-initialization functions ********************************/
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HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing,
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FMC_NORSRAM_TimingTypeDef *ExtTiming);
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HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
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* @{
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*/
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/* I/O operation functions ***************************************************/
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HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
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HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
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HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
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uint32_t uwBufferSize);
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HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
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uint32_t uwBufferSize);
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HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
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HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
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HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
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#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
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/* NOR callback registering/unregistering */
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HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
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pNOR_CallbackTypeDef pCallback);
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HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
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#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
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* @{
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*/
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/* NOR Control functions *****************************************************/
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HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
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HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
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* @{
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*/
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/* NOR State functions ********************************************************/
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HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor);
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HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup NOR_Private_Constants NOR Private Constants
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* @{
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*/
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/* NOR device IDs addresses */
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#define MC_ADDRESS ((uint16_t)0x0000)
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#define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
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#define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
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#define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
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/* NOR CFI IDs addresses */
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#define CFI1_ADDRESS ((uint16_t)0x0061)
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#define CFI2_ADDRESS ((uint16_t)0x0062)
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#define CFI3_ADDRESS ((uint16_t)0x0063)
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#define CFI4_ADDRESS ((uint16_t)0x0064)
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/* NOR operation wait timeout */
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#define NOR_TMEOUT ((uint16_t)0xFFFF)
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/* NOR memory data width */
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#define NOR_MEMORY_8B ((uint8_t)0x00)
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#define NOR_MEMORY_16B ((uint8_t)0x01)
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/* NOR memory device read/write start address */
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#define NOR_MEMORY_ADRESS1 (0x60000000U)
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#define NOR_MEMORY_ADRESS2 (0x64000000U)
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#define NOR_MEMORY_ADRESS3 (0x68000000U)
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#define NOR_MEMORY_ADRESS4 (0x6C000000U)
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup NOR_Private_Macros NOR Private Macros
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* @{
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*/
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/**
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* @brief NOR memory address shifting.
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* @param __NOR_ADDRESS NOR base address
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* @param __NOR_MEMORY_WIDTH_ NOR memory width
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* @param __ADDRESS__ NOR memory address
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* @retval NOR shifted address value
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*/
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#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
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((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
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((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
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((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
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/**
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* @brief NOR memory write data to specified address.
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* @param __ADDRESS__ NOR memory address
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* @param __DATA__ Data to write
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* @retval None
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*/
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#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
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(*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
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__DSB(); \
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} while(0)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* FMC_Bank1 || FSMC_Bank1 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32F4xx_HAL_NOR_H */
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