336 lines
13 KiB
C
336 lines
13 KiB
C
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/*
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* Copyright (C) 2010-2021 Arm Limited or its affiliates.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/* ----------------------------------------------------------------------
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* Project: CMSIS NN Library
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* Title: arm_convolve_s8.c
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* Description: s8 version of convolution using symmetric quantization.
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*
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* $Date: December 14, 2021
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* $Revision: V.2.1.0
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*
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* Target Processor: Cortex-M cores
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*
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* -------------------------------------------------------------------- */
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#include "arm_nnfunctions.h"
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#include "arm_nnsupportfunctions.h"
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/**
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* @ingroup groupNN
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*/
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/**
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* @addtogroup NNConv
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* @{
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*/
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/*
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* Basic s8 convolution function.
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*
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* Refer header file for details. Optimal use case for the DSP/MVE implementation is when input and output channels
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* are multiples of 4 or atleast greater than 4.
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*
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*/
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arm_status arm_convolve_s8(const cmsis_nn_context *ctx,
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const cmsis_nn_conv_params *conv_params,
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const cmsis_nn_per_channel_quant_params *quant_params,
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const cmsis_nn_dims *input_dims,
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const q7_t *input_data,
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const cmsis_nn_dims *filter_dims,
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const q7_t *filter_data,
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const cmsis_nn_dims *bias_dims,
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const int32_t *bias_data,
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const cmsis_nn_dims *output_dims,
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q7_t *output_data)
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{
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(void)bias_dims;
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if (ctx->buf == NULL && arm_convolve_s8_get_buffer_size(input_dims, filter_dims) > 0)
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{
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return ARM_MATH_ARGUMENT_ERROR;
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}
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q15_t *buffer_a = (q15_t *)ctx->buf;
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const int32_t input_batches = input_dims->n;
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const uint16_t input_x = input_dims->w;
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const uint16_t input_y = input_dims->h;
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const uint16_t input_ch = input_dims->c;
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const uint16_t kernel_x = filter_dims->w;
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const uint16_t kernel_y = filter_dims->h;
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const uint16_t output_x = output_dims->w;
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const uint16_t output_y = output_dims->h;
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const uint16_t output_ch = output_dims->c;
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const uint16_t pad_x = conv_params->padding.w;
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const uint16_t pad_y = conv_params->padding.h;
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const uint16_t stride_x = conv_params->stride.w;
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const uint16_t stride_y = conv_params->stride.h;
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const int32_t input_offset = conv_params->input_offset;
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const int32_t out_offset = conv_params->output_offset;
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const int32_t out_activation_min = conv_params->activation.min;
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const int32_t out_activation_max = conv_params->activation.max;
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int32_t *output_mult = quant_params->multiplier;
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int32_t *output_shift = quant_params->shift;
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int i_batch;
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for (i_batch = 0; i_batch < input_batches; i_batch++)
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{
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#if defined(ARM_MATH_MVEI)
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/* Generate upto four columns from the input tensor a GEMM computation */
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q7_t *im2col_buf = (q7_t *)buffer_a;
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q7_t *out = output_data;
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int32_t buffer_fill_cnt = 0;
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int32_t padded = 0;
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const int32_t num_elem = kernel_x * kernel_y * input_ch;
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const int32_t dilation_x = conv_params->dilation.w;
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const int32_t dilation_y = conv_params->dilation.h;
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/* This part implements the im2col function */
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for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
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{
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for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
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{
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const int32_t base_idx_x = stride_x * i_out_x - pad_x;
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const int32_t base_idx_y = stride_y * i_out_y - pad_y;
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for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
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{
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for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
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{
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const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
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const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
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if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
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{
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memset(im2col_buf, (int8_t)-input_offset, sizeof(q7_t) * input_ch);
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padded = 1;
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}
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else
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{
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arm_memcpy_q7(im2col_buf, input_data + (k_y * input_x + k_x) * input_ch, input_ch);
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}
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im2col_buf += input_ch;
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}
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}
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buffer_fill_cnt++;
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/* Computation is filed for every 4 columns */
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if (buffer_fill_cnt == 4 && (padded == 0))
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{
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buffer_fill_cnt = 0;
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out = arm_nn_mat_mul_core_4x_s8(num_elem,
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num_elem,
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(q7_t *)buffer_a,
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filter_data,
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output_ch,
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conv_params,
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quant_params,
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bias_data,
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out);
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im2col_buf = (q7_t *)buffer_a;
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}
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else if (buffer_fill_cnt == 4 && (padded != 0))
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{
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buffer_fill_cnt = 0;
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out = arm_nn_mat_mult_s8(filter_data,
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(q7_t *)buffer_a,
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output_ch,
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4,
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output_shift,
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output_mult,
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out_offset,
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input_offset,
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0,
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out_activation_min,
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out_activation_max,
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num_elem,
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bias_data,
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out);
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im2col_buf = (q7_t *)buffer_a;
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padded = 0;
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}
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}
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}
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/* Handle left over columns */
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if (buffer_fill_cnt != 0)
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{
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out = arm_nn_mat_mult_s8(filter_data,
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(q7_t *)buffer_a,
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output_ch,
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buffer_fill_cnt,
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output_shift,
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output_mult,
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out_offset,
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input_offset,
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0,
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out_activation_min,
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out_activation_max,
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num_elem,
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bias_data,
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out);
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}
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#else // #if defined(ARM_MATH_MVEI)
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const uint16_t dilation_x = conv_params->dilation.w;
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const uint16_t dilation_y = conv_params->dilation.h;
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int32_t i_out_y, i_out_x, i_ker_y, i_ker_x;
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/* Generate two columns from the input tensor a GEMM computation */
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q15_t *two_column_buf = buffer_a;
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q7_t *out = output_data;
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/* This part implements the im2col function */
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for (i_out_y = 0; i_out_y < output_y; i_out_y++)
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{
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for (i_out_x = 0; i_out_x < output_x; i_out_x++)
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{
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const int32_t base_idx_y = stride_y * i_out_y - pad_y;
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const int32_t base_idx_x = stride_x * i_out_x - pad_x;
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for (i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
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{
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for (i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
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{
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const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
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const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
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if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
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{
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/* Filling 0 for out-of-bound paddings */
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memset(two_column_buf, 0, sizeof(q15_t) * input_ch);
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}
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else
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{
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/* Copying the pixel data to column */
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arm_q7_to_q15_with_offset(
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input_data + (k_y * input_x + k_x) * input_ch, two_column_buf, input_ch, input_offset);
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}
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two_column_buf += input_ch;
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}
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}
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/* Computation is filed for every 2 columns */
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if (two_column_buf == buffer_a + 2 * input_ch * kernel_y * kernel_x)
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{
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out = arm_nn_mat_mult_kernel_s8_s16(filter_data,
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buffer_a,
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output_ch,
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output_shift,
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output_mult,
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out_offset,
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out_activation_min,
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out_activation_max,
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input_ch * kernel_y * kernel_x,
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bias_data,
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out);
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/* counter reset */
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two_column_buf = buffer_a;
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}
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}
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}
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/* left-over because odd number of output pixels */
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if (two_column_buf != buffer_a)
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{
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const q7_t *ker_a = filter_data;
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int i;
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for (i = 0; i < output_ch; i++)
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{
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/* Load the accumulator with bias first */
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q31_t sum = 0;
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if (bias_data)
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{
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sum = bias_data[i];
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}
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/* Point to the beginning of the im2col buffer where the input is available as a rearranged column */
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const q15_t *ip_as_col = buffer_a;
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/* 4 multiply and accumulates are done in one loop. */
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#if defined(ARM_MATH_DSP)
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uint16_t col_count = (input_ch * kernel_y * kernel_x) >> 2;
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while (col_count)
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{
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q31_t ker_a1, ker_a2;
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q31_t ip_b1, ip_b2;
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ker_a = read_and_pad(ker_a, &ker_a1, &ker_a2);
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ip_b1 = arm_nn_read_q15x2_ia(&ip_as_col);
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sum = __SMLAD(ker_a1, ip_b1, sum);
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ip_b2 = arm_nn_read_q15x2_ia(&ip_as_col);
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sum = __SMLAD(ker_a2, ip_b2, sum);
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col_count--;
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}
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/* Handle left over mac */
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col_count = input_ch * kernel_y * kernel_x & 0x3;
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#else
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uint16_t col_count = input_ch * kernel_y * kernel_x;
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#endif
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while (col_count)
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{
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q7_t ker_a1 = *ker_a++;
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q15_t ip_b1 = *ip_as_col++;
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sum += ker_a1 * ip_b1;
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col_count--;
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}
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sum = arm_nn_requantize(sum, output_mult[i], output_shift[i]);
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sum += out_offset;
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sum = MAX(sum, out_activation_min);
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sum = MIN(sum, out_activation_max);
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*out++ = (q7_t)sum;
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}
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}
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#endif // #if defined(ARM_MATH_MVEI)
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/* Advance to the next batch */
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input_data += (input_x * input_y * input_ch);
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output_data += (output_x * output_y * output_ch);
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}
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/* Return to application */
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return ARM_MATH_SUCCESS;
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}
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int32_t arm_convolve_s8_get_buffer_size(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *filter_dims)
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{
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#if defined(ARM_MATH_MVEI)
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int32_t col_length = input_dims->c * filter_dims->w * filter_dims->h;
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// Get number of complete int16 lanes(multiple of 8) for given col_length. This is dependent on
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// implementation of arm_nn_mat_mult_s8
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col_length = (col_length + 7) / 8;
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// 4 -> number of im2col buffers, 8 -> 8 elements per Q register
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return 4 * col_length * 8 * (int32_t)sizeof(int8_t);
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#else
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return (2 * input_dims->c * filter_dims->w * filter_dims->h) * (int32_t)sizeof(int16_t);
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#endif
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}
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/**
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* @} end of NNConv group
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*/
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