160 lines
3.9 KiB
C
160 lines
3.9 KiB
C
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/* ----------------------------------------------------------------------
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* Project: CMSIS DSP Library
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* Title: arm_mfcc_f32.c
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* Description: MFCC function for the f32 version
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*
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* $Date: 07 September 2021
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* $Revision: V1.10.0
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*
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* Target Processor: Cortex-M and Cortex-A cores
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* -------------------------------------------------------------------- */
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/*
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* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "dsp/transform_functions.h"
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#include "dsp/statistics_functions.h"
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#include "dsp/basic_math_functions.h"
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#include "dsp/complex_math_functions.h"
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#include "dsp/fast_math_functions.h"
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#include "dsp/matrix_functions.h"
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/**
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@ingroup groupTransforms
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*/
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/**
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@defgroup MFCC MFCC
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MFCC Transform
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There are separate functions for floating-point, Q15, and Q31 data types.
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*/
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/**
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@addtogroup MFCC
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@{
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*/
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/**
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@brief MFCC F32
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@param[in] S points to the mfcc instance structure
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@param[in] pSrc points to the input samples
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@param[out] pDst points to the output MFCC values
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@param[inout] pTmp points to a temporary buffer of complex
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@return none
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@par Description
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The number of input samples if the FFT length used
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when initializing the instance data structure.
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The temporary buffer has a 2*fft length size when MFCC
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is implemented with CFFT.
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It has length FFT Length + 2 when implemented with RFFT
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(default implementation).
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The source buffer is modified by this function.
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*/
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void arm_mfcc_f32(
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const arm_mfcc_instance_f32 * S,
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float32_t *pSrc,
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float32_t *pDst,
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float32_t *pTmp
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)
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{
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float32_t maxValue;
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uint32_t index;
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uint32_t i;
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float32_t result;
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const float32_t *coefs=S->filterCoefs;
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arm_matrix_instance_f32 pDctMat;
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/* Normalize */
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arm_absmax_f32(pSrc,S->fftLen,&maxValue,&index);
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arm_scale_f32(pSrc,1.0f/maxValue,pSrc,S->fftLen);
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/* Multiply by window */
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arm_mult_f32(pSrc,S->windowCoefs,pSrc,S->fftLen);
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/* Compute spectrum magnitude
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*/
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#if defined(ARM_MFCC_CFFT_BASED)
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/* some HW accelerator for CMSIS-DSP used in some boards
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are only providing acceleration for CFFT.
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With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC
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will be accelerated on those boards.
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The default is to use RFFT
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*/
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/* Convert from real to complex */
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for(i=0; i < S->fftLen ; i++)
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{
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pTmp[2*i] = pSrc[i];
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pTmp[2*i+1] = 0.0f;
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}
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arm_cfft_f32(&(S->cfft),pTmp,0,1);
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#else
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/* Default RFFT based implementation */
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arm_rfft_fast_f32(&(S->rfft),pSrc,pTmp,0);
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/* Unpack real values */
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pTmp[S->fftLen]=pTmp[1];
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pTmp[S->fftLen+1]=0.0f;
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pTmp[1]=0.0f;
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#endif
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arm_cmplx_mag_f32(pTmp,pSrc,S->fftLen);
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/* Apply MEL filters */
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for(i=0; i<S->nbMelFilters; i++)
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{
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arm_dot_prod_f32(pSrc+S->filterPos[i],
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coefs,
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S->filterLengths[i],
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&result);
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coefs += S->filterLengths[i];
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pTmp[i] = result;
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}
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/* Compute the log */
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arm_offset_f32(pTmp,1.0e-6f,pTmp,S->nbMelFilters);
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arm_vlog_f32(pTmp,pTmp,S->nbMelFilters);
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/* Multiply with the DCT matrix */
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pDctMat.numRows=S->nbDctOutputs;
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pDctMat.numCols=S->nbMelFilters;
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pDctMat.pData=(float32_t*)S->dctCoefs;
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arm_mat_vec_mult_f32(&pDctMat, pTmp, pDst);
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}
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/**
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@} end of MFCC group
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*/
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