104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* JZ4780 EFUSE driver
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*
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* Copyright (c) 2014 Imagination Technologies
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* Author: Alex Smith <alex.smith@imgtec.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/unaligned.h>
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#include <errno.h>
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#include <mach/jz4780.h>
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#include <wait_bit.h>
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#define EFUSE_EFUCTRL 0xd0
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#define EFUSE_EFUCFG 0xd4
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#define EFUSE_EFUSTATE 0xd8
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#define EFUSE_EFUDATA(n) (0xdc + ((n) * 4))
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#define EFUSE_EFUCTRL_RD_EN BIT(0)
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#define EFUSE_EFUCTRL_LEN_BIT 16
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#define EFUSE_EFUCTRL_LEN_MASK 0x1f
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#define EFUSE_EFUCTRL_ADDR_BIT 21
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#define EFUSE_EFUCTRL_ADDR_MASK 0x1ff
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#define EFUSE_EFUCTRL_CS BIT(30)
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#define EFUSE_EFUCFG_RD_STROBE_BIT 16
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#define EFUSE_EFUCFG_RD_STROBE_MASK 0xf
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#define EFUSE_EFUCFG_RD_ADJ_BIT 20
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#define EFUSE_EFUCFG_RD_ADJ_MASK 0xf
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#define EFUSE_EFUSTATE_RD_DONE BIT(0)
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static void jz4780_efuse_read_chunk(size_t addr, size_t count, u8 *buf)
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{
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void __iomem *regs = (void __iomem *)NEMC_BASE;
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size_t i;
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u32 val;
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int ret;
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val = EFUSE_EFUCTRL_RD_EN |
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((count - 1) << EFUSE_EFUCTRL_LEN_BIT) |
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(addr << EFUSE_EFUCTRL_ADDR_BIT) |
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((addr > 0x200) ? EFUSE_EFUCTRL_CS : 0);
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writel(val, regs + EFUSE_EFUCTRL);
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ret = wait_for_bit_le32(regs + EFUSE_EFUSTATE,
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EFUSE_EFUSTATE_RD_DONE, true, 10000, false);
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if (ret)
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return;
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if ((count % 4) == 0) {
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for (i = 0; i < count / 4; i++) {
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val = readl(regs + EFUSE_EFUDATA(i));
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put_unaligned(val, (u32 *)(buf + (i * 4)));
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}
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} else {
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val = readl(regs + EFUSE_EFUDATA(0));
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if (count > 2)
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buf[2] = (val >> 16) & 0xff;
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if (count > 1)
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buf[1] = (val >> 8) & 0xff;
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buf[0] = val & 0xff;
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}
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}
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static inline int jz4780_efuse_chunk_size(size_t count)
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{
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if (count >= 32)
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return 32;
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else if ((count / 4) > 0)
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return (count / 4) * 4;
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else
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return count % 4;
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}
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void jz4780_efuse_read(size_t addr, size_t count, u8 *buf)
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{
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size_t chunk;
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while (count > 0) {
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chunk = jz4780_efuse_chunk_size(count);
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jz4780_efuse_read_chunk(addr, chunk, buf);
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addr += chunk;
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buf += chunk;
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count -= chunk;
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}
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}
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void jz4780_efuse_init(u32 ahb2_rate)
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{
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void __iomem *regs = (void __iomem *)NEMC_BASE;
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u32 rd_adj, rd_strobe, tmp;
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rd_adj = (((6500 * (ahb2_rate / 1000000)) / 1000000) + 0xf) / 2;
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tmp = (((35000 * (ahb2_rate / 1000000)) / 1000000) - 4) - rd_adj;
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rd_strobe = ((tmp + 0xf) / 2 < 7) ? 7 : (tmp + 0xf) / 2;
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tmp = (rd_adj << EFUSE_EFUCFG_RD_ADJ_BIT) |
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(rd_strobe << EFUSE_EFUCFG_RD_STROBE_BIT);
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writel(tmp, regs + EFUSE_EFUCFG);
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}
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