966 lines
24 KiB
C
966 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <command.h>
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#include <env.h>
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#include <i2c.h>
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#include <irq_func.h>
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#include <asm/io.h>
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#ifdef CONFIG_FSL_LSCH2
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#include <asm/arch/immap_lsch2.h>
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#elif defined(CONFIG_FSL_LSCH3)
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#include <asm/arch/immap_lsch3.h>
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#else
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#include <asm/immap_85xx.h>
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#endif
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#include "vid.h"
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int __weak i2c_multiplexer_select_vid_channel(u8 channel)
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{
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return 0;
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}
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/*
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* Compensate for a board specific voltage drop between regulator and SoC
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* return a value in mV
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*/
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int __weak board_vdd_drop_compensation(void)
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{
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return 0;
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}
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/*
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* Board specific settings for specific voltage value
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*/
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int __weak board_adjust_vdd(int vdd)
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{
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return 0;
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}
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#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
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defined(CONFIG_VOL_MONITOR_IR36021_READ)
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/*
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* Get the i2c address configuration for the IR regulator chip
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*
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* There are some variance in the RDB HW regarding the I2C address configuration
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* for the IR regulator chip, which is likely a problem of external resistor
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* accuracy. So we just check each address in a hopefully non-intrusive mode
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* and use the first one that seems to work
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*
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* The IR chip can show up under the following addresses:
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* 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
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* 0x09 (Verified on T1040RDB-PA)
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* 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
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*/
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static int find_ir_chip_on_i2c(void)
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{
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int i2caddress;
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int ret;
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u8 byte;
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int i;
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const int ir_i2c_addr[] = {0x38, 0x08, 0x09};
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#ifdef CONFIG_DM_I2C
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struct udevice *dev;
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#endif
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/* Check all the address */
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for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
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i2caddress = ir_i2c_addr[i];
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#ifndef CONFIG_DM_I2C
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ret = i2c_read(i2caddress,
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IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
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sizeof(byte));
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#else
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ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev);
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if (!ret)
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ret = dm_i2c_read(dev, IR36021_MFR_ID_OFFSET,
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(void *)&byte, sizeof(byte));
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#endif
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if ((ret >= 0) && (byte == IR36021_MFR_ID))
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return i2caddress;
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}
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return -1;
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}
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#endif
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/* Maximum loop count waiting for new voltage to take effect */
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#define MAX_LOOP_WAIT_NEW_VOL 100
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/* Maximum loop count waiting for the voltage to be stable */
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#define MAX_LOOP_WAIT_VOL_STABLE 100
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/*
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* read_voltage from sensor on I2C bus
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* We use average of 4 readings, waiting for WAIT_FOR_ADC before
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* another reading
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*/
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#define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */
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/* If an INA220 chip is available, we can use it to read back the voltage
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* as it may have a higher accuracy than the IR chip for the same purpose
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*/
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#ifdef CONFIG_VOL_MONITOR_INA220
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#define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */
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#define ADC_MIN_ACCURACY 4
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#else
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#define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */
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#define ADC_MIN_ACCURACY 4
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#endif
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#ifdef CONFIG_VOL_MONITOR_INA220
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static int read_voltage_from_INA220(int i2caddress)
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{
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int i, ret, voltage_read = 0;
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u16 vol_mon;
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u8 buf[2];
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#ifdef CONFIG_DM_I2C
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struct udevice *dev;
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#endif
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for (i = 0; i < NUM_READINGS; i++) {
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#ifndef CONFIG_DM_I2C
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ret = i2c_read(I2C_VOL_MONITOR_ADDR,
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I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
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(void *)&buf, 2);
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#else
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ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev);
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if (!ret)
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ret = dm_i2c_read(dev, I2C_VOL_MONITOR_BUS_V_OFFSET,
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(void *)&buf, 2);
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#endif
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if (ret) {
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printf("VID: failed to read core voltage\n");
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return ret;
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}
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vol_mon = (buf[0] << 8) | buf[1];
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if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
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printf("VID: Core voltage sensor error\n");
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return -1;
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}
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debug("VID: bus voltage reads 0x%04x\n", vol_mon);
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/* LSB = 4mv */
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voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
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udelay(WAIT_FOR_ADC);
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}
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/* calculate the average */
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voltage_read /= NUM_READINGS;
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return voltage_read;
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}
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#endif
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/* read voltage from IR */
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#ifdef CONFIG_VOL_MONITOR_IR36021_READ
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static int read_voltage_from_IR(int i2caddress)
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{
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int i, ret, voltage_read = 0;
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u16 vol_mon;
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u8 buf;
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#ifdef CONFIG_DM_I2C
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struct udevice *dev;
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#endif
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for (i = 0; i < NUM_READINGS; i++) {
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#ifndef CONFIG_DM_I2C
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ret = i2c_read(i2caddress,
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IR36021_LOOP1_VOUT_OFFSET,
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1, (void *)&buf, 1);
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#else
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ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev);
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if (!ret)
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ret = dm_i2c_read(dev, IR36021_LOOP1_VOUT_OFFSET,
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(void *)&buf, 1);
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#endif
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if (ret) {
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printf("VID: failed to read vcpu\n");
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return ret;
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}
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vol_mon = buf;
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if (!vol_mon) {
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printf("VID: Core voltage sensor error\n");
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return -1;
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}
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debug("VID: bus voltage reads 0x%02x\n", vol_mon);
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/* Resolution is 1/128V. We scale up here to get 1/128mV
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* and divide at the end
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*/
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voltage_read += vol_mon * 1000;
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udelay(WAIT_FOR_ADC);
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}
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/* Scale down to the real mV as IR resolution is 1/128V, rounding up */
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voltage_read = DIV_ROUND_UP(voltage_read, 128);
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/* calculate the average */
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voltage_read /= NUM_READINGS;
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/* Compensate for a board specific voltage drop between regulator and
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* SoC before converting into an IR VID value
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*/
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voltage_read -= board_vdd_drop_compensation();
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return voltage_read;
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}
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#endif
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#ifdef CONFIG_VOL_MONITOR_LTC3882_READ
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/* read the current value of the LTC Regulator Voltage */
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static int read_voltage_from_LTC(int i2caddress)
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{
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int ret, vcode = 0;
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u8 chan = PWM_CHANNEL0;
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#ifndef CONFIG_DM_I2C
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/* select the PAGE 0 using PMBus commands PAGE for VDD*/
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ret = i2c_write(I2C_VOL_MONITOR_ADDR,
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PMBUS_CMD_PAGE, 1, &chan, 1);
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#else
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev);
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if (!ret)
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ret = dm_i2c_write(dev, PMBUS_CMD_PAGE, &chan, 1);
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#endif
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if (ret) {
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printf("VID: failed to select VDD Page 0\n");
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return ret;
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}
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#ifndef CONFIG_DM_I2C
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/*read the output voltage using PMBus command READ_VOUT*/
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ret = i2c_read(I2C_VOL_MONITOR_ADDR,
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PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
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#else
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ret = dm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2);
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if (ret) {
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printf("VID: failed to read the volatge\n");
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return ret;
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}
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#endif
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if (ret) {
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printf("VID: failed to read the volatge\n");
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return ret;
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}
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/* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */
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vcode = DIV_ROUND_UP(vcode * 1000, 4096);
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return vcode;
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}
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#endif
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static int read_voltage(int i2caddress)
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{
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int voltage_read;
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#ifdef CONFIG_VOL_MONITOR_INA220
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voltage_read = read_voltage_from_INA220(i2caddress);
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#elif defined CONFIG_VOL_MONITOR_IR36021_READ
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voltage_read = read_voltage_from_IR(i2caddress);
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#elif defined CONFIG_VOL_MONITOR_LTC3882_READ
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voltage_read = read_voltage_from_LTC(i2caddress);
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#else
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return -1;
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#endif
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return voltage_read;
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}
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#ifdef CONFIG_VOL_MONITOR_IR36021_SET
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/*
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* We need to calculate how long before the voltage stops to drop
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* or increase. It returns with the loop count. Each loop takes
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* several readings (WAIT_FOR_ADC)
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*/
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static int wait_for_new_voltage(int vdd, int i2caddress)
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{
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int timeout, vdd_current;
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vdd_current = read_voltage(i2caddress);
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/* wait until voltage starts to reach the target. Voltage slew
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* rates by typical regulators will always lead to stable readings
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* within each fairly long ADC interval in comparison to the
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* intended voltage delta change until the target voltage is
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* reached. The fairly small voltage delta change to any target
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* VID voltage also means that this function will always complete
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* within few iterations. If the timeout was ever reached, it would
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* point to a serious failure in the regulator system.
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*/
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for (timeout = 0;
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abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) &&
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timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) {
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vdd_current = read_voltage(i2caddress);
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}
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if (timeout >= MAX_LOOP_WAIT_NEW_VOL) {
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printf("VID: Voltage adjustment timeout\n");
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return -1;
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}
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return timeout;
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}
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/*
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* this function keeps reading the voltage until it is stable or until the
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* timeout expires
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*/
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static int wait_for_voltage_stable(int i2caddress)
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{
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int timeout, vdd_current, vdd;
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vdd = read_voltage(i2caddress);
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udelay(NUM_READINGS * WAIT_FOR_ADC);
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/* wait until voltage is stable */
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vdd_current = read_voltage(i2caddress);
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/* The maximum timeout is
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* MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC
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*/
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for (timeout = MAX_LOOP_WAIT_VOL_STABLE;
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abs(vdd - vdd_current) > ADC_MIN_ACCURACY &&
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timeout > 0; timeout--) {
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vdd = vdd_current;
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udelay(NUM_READINGS * WAIT_FOR_ADC);
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vdd_current = read_voltage(i2caddress);
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}
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if (timeout == 0)
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return -1;
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return vdd_current;
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}
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/* Set the voltage to the IR chip */
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static int set_voltage_to_IR(int i2caddress, int vdd)
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{
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int wait, vdd_last;
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int ret;
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u8 vid;
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/* Compensate for a board specific voltage drop between regulator and
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* SoC before converting into an IR VID value
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*/
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vdd += board_vdd_drop_compensation();
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#ifdef CONFIG_FSL_LSCH2
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vid = DIV_ROUND_UP(vdd - 265, 5);
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#else
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vid = DIV_ROUND_UP(vdd - 245, 5);
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#endif
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#ifndef CONFIG_DM_I2C
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ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
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1, (void *)&vid, sizeof(vid));
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#else
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev);
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if (!ret)
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ret = dm_i2c_write(dev, IR36021_LOOP1_MANUAL_ID_OFFSET,
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(void *)&vid, sizeof(vid));
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#endif
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if (ret) {
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printf("VID: failed to write VID\n");
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return -1;
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}
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wait = wait_for_new_voltage(vdd, i2caddress);
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if (wait < 0)
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return -1;
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debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);
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vdd_last = wait_for_voltage_stable(i2caddress);
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if (vdd_last < 0)
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return -1;
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debug("VID: Current voltage is %d mV\n", vdd_last);
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return vdd_last;
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}
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#endif
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#ifdef CONFIG_VOL_MONITOR_LTC3882_SET
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/* this function sets the VDD and returns the value set */
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static int set_voltage_to_LTC(int i2caddress, int vdd)
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{
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int ret, vdd_last, vdd_target = vdd;
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int count = 100, temp = 0;
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/* Scale up to the LTC resolution is 1/4096V */
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vdd = (vdd * 4096) / 1000;
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/* 5-byte buffer which needs to be sent following the
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* PMBus command PAGE_PLUS_WRITE.
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*/
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u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
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vdd & 0xFF, (vdd & 0xFF00) >> 8};
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/* Write the desired voltage code to the regulator */
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#ifndef CONFIG_DM_I2C
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ret = i2c_write(I2C_VOL_MONITOR_ADDR,
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PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
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#else
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(0, I2C_VOL_MONITOR_ADDR, 1, &dev);
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if (!ret)
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ret = dm_i2c_write(dev, PMBUS_CMD_PAGE_PLUS_WRITE,
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(void *)&buff, 5);
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#endif
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if (ret) {
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printf("VID: I2C failed to write to the volatge regulator\n");
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return -1;
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}
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/* Wait for the volatge to get to the desired value */
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do {
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vdd_last = read_voltage_from_LTC(i2caddress);
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if (vdd_last < 0) {
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printf("VID: Couldn't read sensor abort VID adjust\n");
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return -1;
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}
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count--;
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temp = vdd_last - vdd_target;
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} while ((abs(temp) > 2) && (count > 0));
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return vdd_last;
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}
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#endif
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static int set_voltage(int i2caddress, int vdd)
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{
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int vdd_last = -1;
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#ifdef CONFIG_VOL_MONITOR_IR36021_SET
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vdd_last = set_voltage_to_IR(i2caddress, vdd);
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#elif defined CONFIG_VOL_MONITOR_LTC3882_SET
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vdd_last = set_voltage_to_LTC(i2caddress, vdd);
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#else
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#error Specific voltage monitor must be defined
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#endif
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return vdd_last;
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}
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#ifdef CONFIG_FSL_LSCH3
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int adjust_vdd(ulong vdd_override)
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{
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int re_enable = disable_interrupts();
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struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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u32 fusesr;
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#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
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defined(CONFIG_VOL_MONITOR_IR36021_READ)
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u8 vid, buf;
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#else
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u8 vid;
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#endif
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int vdd_target, vdd_current, vdd_last;
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int ret, i2caddress;
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unsigned long vdd_string_override;
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char *vdd_string;
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#ifdef CONFIG_ARCH_LX2160A
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static const u16 vdd[32] = {
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8250,
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7875,
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7750,
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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8000,
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8125,
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8250,
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0, /* reserved */
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8500,
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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};
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#else
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#ifdef CONFIG_ARCH_LS1088A
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static const uint16_t vdd[32] = {
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10250,
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9875,
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9750,
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0, /* reserved */
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0, /* reserved */
|
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0, /* reserved */
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0, /* reserved */
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0, /* reserved */
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9000,
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0, /* reserved */
|
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0, /* reserved */
|
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0, /* reserved */
|
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0, /* reserved */
|
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0, /* reserved */
|
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0, /* reserved */
|
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0, /* reserved */
|
|
10000, /* 1.0000V */
|
|
10125,
|
|
10250,
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
};
|
|
|
|
#else
|
|
static const uint16_t vdd[32] = {
|
|
10500,
|
|
0, /* reserved */
|
|
9750,
|
|
0, /* reserved */
|
|
9500,
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
9000, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
10000, /* 1.0000V */
|
|
0, /* reserved */
|
|
10250,
|
|
0, /* reserved */
|
|
10500,
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
0, /* reserved */
|
|
};
|
|
#endif
|
|
#endif
|
|
struct vdd_drive {
|
|
u8 vid;
|
|
unsigned voltage;
|
|
};
|
|
|
|
ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
|
|
if (ret) {
|
|
debug("VID: I2C failed to switch channel\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
|
|
defined(CONFIG_VOL_MONITOR_IR36021_READ)
|
|
ret = find_ir_chip_on_i2c();
|
|
if (ret < 0) {
|
|
printf("VID: Could not find voltage regulator on I2C.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
} else {
|
|
i2caddress = ret;
|
|
debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
|
|
}
|
|
|
|
/* check IR chip work on Intel mode*/
|
|
#ifndef CONFIG_DM_I2C
|
|
ret = i2c_read(i2caddress,
|
|
IR36021_INTEL_MODE_OOFSET,
|
|
1, (void *)&buf, 1);
|
|
#else
|
|
struct udevice *dev;
|
|
|
|
ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev);
|
|
if (!ret)
|
|
ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET,
|
|
(void *)&buf, 1);
|
|
#endif
|
|
if (ret) {
|
|
printf("VID: failed to read IR chip mode.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
|
|
if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
|
|
printf("VID: IR Chip is not used in Intel mode.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
#endif
|
|
|
|
/* get the voltage ID from fuse status register */
|
|
fusesr = in_le32(&gur->dcfg_fusesr);
|
|
vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
|
|
FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
|
|
if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
|
|
vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
|
|
FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
|
|
}
|
|
vdd_target = vdd[vid];
|
|
|
|
/* check override variable for overriding VDD */
|
|
vdd_string = env_get(CONFIG_VID_FLS_ENV);
|
|
if (vdd_override == 0 && vdd_string &&
|
|
!strict_strtoul(vdd_string, 10, &vdd_string_override))
|
|
vdd_override = vdd_string_override;
|
|
|
|
if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
|
|
vdd_target = vdd_override * 10; /* convert to 1/10 mV */
|
|
debug("VDD override is %lu\n", vdd_override);
|
|
} else if (vdd_override != 0) {
|
|
printf("Invalid value.\n");
|
|
}
|
|
|
|
/* divide and round up by 10 to get a value in mV */
|
|
vdd_target = DIV_ROUND_UP(vdd_target, 10);
|
|
if (vdd_target == 0) {
|
|
debug("VID: VID not used\n");
|
|
ret = 0;
|
|
goto exit;
|
|
} else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) {
|
|
/* Check vdd_target is in valid range */
|
|
printf("VID: Target VID %d mV is not in range.\n",
|
|
vdd_target);
|
|
ret = -1;
|
|
goto exit;
|
|
} else {
|
|
debug("VID: vid = %d mV\n", vdd_target);
|
|
}
|
|
|
|
/*
|
|
* Read voltage monitor to check real voltage.
|
|
*/
|
|
vdd_last = read_voltage(i2caddress);
|
|
if (vdd_last < 0) {
|
|
printf("VID: Couldn't read sensor abort VID adjustment\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
vdd_current = vdd_last;
|
|
debug("VID: Core voltage is currently at %d mV\n", vdd_last);
|
|
|
|
#ifdef CONFIG_VOL_MONITOR_LTC3882_SET
|
|
/* Set the target voltage */
|
|
vdd_last = vdd_current = set_voltage(i2caddress, vdd_target);
|
|
#else
|
|
/*
|
|
* Adjust voltage to at or one step above target.
|
|
* As measurements are less precise than setting the values
|
|
* we may run through dummy steps that cancel each other
|
|
* when stepping up and then down.
|
|
*/
|
|
while (vdd_last > 0 &&
|
|
vdd_last < vdd_target) {
|
|
vdd_current += IR_VDD_STEP_UP;
|
|
vdd_last = set_voltage(i2caddress, vdd_current);
|
|
}
|
|
while (vdd_last > 0 &&
|
|
vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
|
|
vdd_current -= IR_VDD_STEP_DOWN;
|
|
vdd_last = set_voltage(i2caddress, vdd_current);
|
|
}
|
|
|
|
#endif
|
|
if (board_adjust_vdd(vdd_target) < 0) {
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
|
|
if (vdd_last > 0)
|
|
printf("VID: Core voltage after adjustment is at %d mV\n",
|
|
vdd_last);
|
|
else
|
|
ret = -1;
|
|
exit:
|
|
if (re_enable)
|
|
enable_interrupts();
|
|
i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
|
|
return ret;
|
|
}
|
|
#else /* !CONFIG_FSL_LSCH3 */
|
|
int adjust_vdd(ulong vdd_override)
|
|
{
|
|
int re_enable = disable_interrupts();
|
|
#if defined(CONFIG_FSL_LSCH2)
|
|
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
|
|
#else
|
|
ccsr_gur_t __iomem *gur =
|
|
(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
|
|
#endif
|
|
u32 fusesr;
|
|
u8 vid, buf;
|
|
int vdd_target, vdd_current, vdd_last;
|
|
int ret, i2caddress;
|
|
unsigned long vdd_string_override;
|
|
char *vdd_string;
|
|
static const uint16_t vdd[32] = {
|
|
0, /* unused */
|
|
9875, /* 0.9875V */
|
|
9750,
|
|
9625,
|
|
9500,
|
|
9375,
|
|
9250,
|
|
9125,
|
|
9000,
|
|
8875,
|
|
8750,
|
|
8625,
|
|
8500,
|
|
8375,
|
|
8250,
|
|
8125,
|
|
10000, /* 1.0000V */
|
|
10125,
|
|
10250,
|
|
10375,
|
|
10500,
|
|
10625,
|
|
10750,
|
|
10875,
|
|
11000,
|
|
0, /* reserved */
|
|
};
|
|
struct vdd_drive {
|
|
u8 vid;
|
|
unsigned voltage;
|
|
};
|
|
|
|
ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
|
|
if (ret) {
|
|
debug("VID: I2C failed to switch channel\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
|
|
defined(CONFIG_VOL_MONITOR_IR36021_READ)
|
|
ret = find_ir_chip_on_i2c();
|
|
if (ret < 0) {
|
|
printf("VID: Could not find voltage regulator on I2C.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
} else {
|
|
i2caddress = ret;
|
|
debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
|
|
}
|
|
|
|
/* check IR chip work on Intel mode*/
|
|
#ifndef CONFIG_DM_I2C
|
|
ret = i2c_read(i2caddress,
|
|
IR36021_INTEL_MODE_OOFSET,
|
|
1, (void *)&buf, 1);
|
|
#else
|
|
struct udevice *dev;
|
|
|
|
ret = i2c_get_chip_for_busnum(0, i2caddress, 1, &dev);
|
|
if (!ret)
|
|
ret = dm_i2c_read(dev, IR36021_INTEL_MODE_OOFSET,
|
|
(void *)&buf, 1);
|
|
#endif
|
|
if (ret) {
|
|
printf("VID: failed to read IR chip mode.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
|
|
printf("VID: IR Chip is not used in Intel mode.\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
#endif
|
|
|
|
/* get the voltage ID from fuse status register */
|
|
fusesr = in_be32(&gur->dcfg_fusesr);
|
|
/*
|
|
* VID is used according to the table below
|
|
* ---------------------------------------
|
|
* | DA_V |
|
|
* |-------------------------------------|
|
|
* | 5b00000 | 5b00001-5b11110 | 5b11111 |
|
|
* ---------------+---------+-----------------+---------|
|
|
* | D | 5b00000 | NO VID | VID = DA_V | NO VID |
|
|
* | A |----------+---------+-----------------+---------|
|
|
* | _ | 5b00001 |VID = | VID = |VID = |
|
|
* | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT|
|
|
* | _ | 5b11110 | | | |
|
|
* | A |----------+---------+-----------------+---------|
|
|
* | L | 5b11111 | No VID | VID = DA_V | NO VID |
|
|
* | T | | | | |
|
|
* ------------------------------------------------------
|
|
*/
|
|
#ifdef CONFIG_FSL_LSCH2
|
|
vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) &
|
|
FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK;
|
|
if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) {
|
|
vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) &
|
|
FSL_CHASSIS2_DCFG_FUSESR_VID_MASK;
|
|
}
|
|
#else
|
|
vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
|
|
FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
|
|
if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) {
|
|
vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
|
|
FSL_CORENET_DCFG_FUSESR_VID_MASK;
|
|
}
|
|
#endif
|
|
vdd_target = vdd[vid];
|
|
|
|
/* check override variable for overriding VDD */
|
|
vdd_string = env_get(CONFIG_VID_FLS_ENV);
|
|
if (vdd_override == 0 && vdd_string &&
|
|
!strict_strtoul(vdd_string, 10, &vdd_string_override))
|
|
vdd_override = vdd_string_override;
|
|
if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
|
|
vdd_target = vdd_override * 10; /* convert to 1/10 mV */
|
|
debug("VDD override is %lu\n", vdd_override);
|
|
} else if (vdd_override != 0) {
|
|
printf("Invalid value.\n");
|
|
}
|
|
if (vdd_target == 0) {
|
|
debug("VID: VID not used\n");
|
|
ret = 0;
|
|
goto exit;
|
|
} else {
|
|
/* divide and round up by 10 to get a value in mV */
|
|
vdd_target = DIV_ROUND_UP(vdd_target, 10);
|
|
debug("VID: vid = %d mV\n", vdd_target);
|
|
}
|
|
|
|
/*
|
|
* Read voltage monitor to check real voltage.
|
|
*/
|
|
vdd_last = read_voltage(i2caddress);
|
|
if (vdd_last < 0) {
|
|
printf("VID: Couldn't read sensor abort VID adjustment\n");
|
|
ret = -1;
|
|
goto exit;
|
|
}
|
|
vdd_current = vdd_last;
|
|
debug("VID: Core voltage is currently at %d mV\n", vdd_last);
|
|
/*
|
|
* Adjust voltage to at or one step above target.
|
|
* As measurements are less precise than setting the values
|
|
* we may run through dummy steps that cancel each other
|
|
* when stepping up and then down.
|
|
*/
|
|
while (vdd_last > 0 &&
|
|
vdd_last < vdd_target) {
|
|
vdd_current += IR_VDD_STEP_UP;
|
|
vdd_last = set_voltage(i2caddress, vdd_current);
|
|
}
|
|
while (vdd_last > 0 &&
|
|
vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
|
|
vdd_current -= IR_VDD_STEP_DOWN;
|
|
vdd_last = set_voltage(i2caddress, vdd_current);
|
|
}
|
|
|
|
if (vdd_last > 0)
|
|
printf("VID: Core voltage after adjustment is at %d mV\n",
|
|
vdd_last);
|
|
else
|
|
ret = -1;
|
|
exit:
|
|
if (re_enable)
|
|
enable_interrupts();
|
|
|
|
i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static int print_vdd(void)
|
|
{
|
|
int vdd_last, ret, i2caddress;
|
|
|
|
ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
|
|
if (ret) {
|
|
debug("VID : I2c failed to switch channel\n");
|
|
return -1;
|
|
}
|
|
#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
|
|
defined(CONFIG_VOL_MONITOR_IR36021_READ)
|
|
ret = find_ir_chip_on_i2c();
|
|
if (ret < 0) {
|
|
printf("VID: Could not find voltage regulator on I2C.\n");
|
|
goto exit;
|
|
} else {
|
|
i2caddress = ret;
|
|
debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Read voltage monitor to check real voltage.
|
|
*/
|
|
vdd_last = read_voltage(i2caddress);
|
|
if (vdd_last < 0) {
|
|
printf("VID: Couldn't read sensor abort VID adjustment\n");
|
|
goto exit;
|
|
}
|
|
printf("VID: Core voltage is at %d mV\n", vdd_last);
|
|
exit:
|
|
i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
|
|
|
|
return ret < 0 ? -1 : 0;
|
|
|
|
}
|
|
|
|
static int do_vdd_override(cmd_tbl_t *cmdtp,
|
|
int flag, int argc,
|
|
char * const argv[])
|
|
{
|
|
ulong override;
|
|
|
|
if (argc < 2)
|
|
return CMD_RET_USAGE;
|
|
|
|
if (!strict_strtoul(argv[1], 10, &override))
|
|
adjust_vdd(override); /* the value is checked by callee */
|
|
else
|
|
return CMD_RET_USAGE;
|
|
return 0;
|
|
}
|
|
|
|
static int do_vdd_read(cmd_tbl_t *cmdtp,
|
|
int flag, int argc,
|
|
char * const argv[])
|
|
{
|
|
if (argc < 1)
|
|
return CMD_RET_USAGE;
|
|
print_vdd();
|
|
|
|
return 0;
|
|
}
|
|
|
|
U_BOOT_CMD(
|
|
vdd_override, 2, 0, do_vdd_override,
|
|
"override VDD",
|
|
" - override with the voltage specified in mV, eg. 1050"
|
|
);
|
|
|
|
U_BOOT_CMD(
|
|
vdd_read, 1, 0, do_vdd_read,
|
|
"read VDD",
|
|
" - Read the voltage specified in mV"
|
|
)
|