104 lines
1.7 KiB
C
104 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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#include <common.h>
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#include <linux/io.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/gpio.h>
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#define DB_88F6281_OE_LOW ~(BIT(7))
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#define DB_88F6281_OE_HIGH ~(BIT(15) | BIT(14) | BIT(13) | BIT(4))
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#define DB_88F6281_OE_VAL_LOW BIT(7)
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#define DB_88F6281_OE_VAL_HIGH 0
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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mvebu_config_gpio(DB_88F6281_OE_VAL_LOW,
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DB_88F6281_OE_VAL_HIGH,
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DB_88F6281_OE_LOW, DB_88F6281_OE_HIGH);
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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#ifdef CONFIG_CMD_NAND
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MPP0_NF_IO2,
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MPP1_NF_IO3,
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MPP2_NF_IO4,
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MPP3_NF_IO5,
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#else
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MPP0_SPI_SCn,
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MPP1_SPI_MOSI,
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MPP2_SPI_SCK,
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MPP3_SPI_MISO,
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#endif
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MPP4_NF_IO6,
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MPP5_NF_IO7,
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MPP6_SYSRST_OUTn,
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MPP7_GPO,
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MPP8_TW_SDA,
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MPP9_TW_SCK,
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP12_SD_CLK,
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MPP13_SD_CMD,
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MPP14_SD_D0,
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MPP15_SD_D1,
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MPP16_SD_D2,
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MPP17_SD_D3,
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MPP18_NF_IO0,
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MPP19_NF_IO1,
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MPP20_SATA1_ACTn,
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MPP21_SATA0_ACTn,
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MPP22_GPIO,
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MPP23_GPIO,
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MPP24_GPIO,
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MPP25_GPIO,
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MPP26_GPIO,
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MPP27_GPIO,
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MPP28_GPIO,
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MPP29_GPIO,
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MPP30_GPIO,
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MPP31_GPIO,
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MPP32_GPIO,
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MPP33_GPIO,
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MPP34_GPIO,
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MPP35_GPIO,
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MPP36_GPIO,
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MPP37_GPIO,
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MPP38_GPIO,
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MPP39_GPIO,
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MPP40_GPIO,
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MPP41_GPIO,
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MPP42_GPIO,
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MPP43_GPIO,
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MPP44_GPIO,
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MPP45_GPIO,
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MPP46_GPIO,
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MPP47_GPIO,
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MPP48_GPIO,
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MPP49_GPIO,
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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/* automatically defined by kirkwood config.h */
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void reset_phy(void)
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{
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}
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#endif
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