186 lines
5.8 KiB
C
186 lines
5.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2017-2018 NXP
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*
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*/
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#ifndef SC_RPC_H
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#define SC_RPC_H
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/* Note: Check SCFW API Released DOC before you want to modify something */
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#define SC_RPC_VERSION 1U
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#define SC_RPC_MAX_MSG 8U
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#define RPC_VER(MSG) ((MSG)->version)
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#define RPC_SIZE(MSG) ((MSG)->size)
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#define RPC_SVC(MSG) ((MSG)->svc)
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#define RPC_FUNC(MSG) ((MSG)->func)
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#define RPC_R8(MSG) ((MSG)->func)
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#define RPC_I32(MSG, IDX) ((MSG)->DATA.i32[(IDX) / 4U])
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#define RPC_I16(MSG, IDX) ((MSG)->DATA.i16[(IDX) / 2U])
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#define RPC_I8(MSG, IDX) ((MSG)->DATA.i8[(IDX)])
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#define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U])
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#define RPC_U16(MSG, IDX) ((MSG)->DATA.u16[(IDX) / 2U])
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#define RPC_U8(MSG, IDX) ((MSG)->DATA.u8[(IDX)])
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#define SC_RPC_SVC_UNKNOWN 0U
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#define SC_RPC_SVC_RETURN 1U
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#define SC_RPC_SVC_PM 2U
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#define SC_RPC_SVC_RM 3U
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#define SC_RPC_SVC_TIMER 5U
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#define SC_RPC_SVC_PAD 6U
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#define SC_RPC_SVC_MISC 7U
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#define SC_RPC_SVC_IRQ 8U
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#define SC_RPC_SVC_SECO 9U
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#define SC_RPC_SVC_ABORT 10U
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/* Types */
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struct sc_rpc_msg_s {
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u8 version;
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u8 size;
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u8 svc;
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u8 func;
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union {
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s32 i32[(SC_RPC_MAX_MSG - 1U)];
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s16 i16[(SC_RPC_MAX_MSG - 1U) * 2U];
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s8 i8[(SC_RPC_MAX_MSG - 1U) * 4U];
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u32 u32[(SC_RPC_MAX_MSG - 1U)];
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u16 u16[(SC_RPC_MAX_MSG - 1U) * 2U];
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u8 u8[(SC_RPC_MAX_MSG - 1U) * 4U];
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} DATA;
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};
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/* PM RPC */
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#define PM_FUNC_UNKNOWN 0
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#define PM_FUNC_SET_SYS_POWER_MODE 19U
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#define PM_FUNC_SET_PARTITION_POWER_MODE 1U
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#define PM_FUNC_GET_SYS_POWER_MODE 2U
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#define PM_FUNC_SET_RESOURCE_POWER_MODE 3U
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#define PM_FUNC_GET_RESOURCE_POWER_MODE 4U
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#define PM_FUNC_REQ_LOW_POWER_MODE 16U
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#define PM_FUNC_REQ_CPU_LOW_POWER_MODE 20U
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#define PM_FUNC_SET_CPU_RESUME_ADDR 17U
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#define PM_FUNC_SET_CPU_RESUME 21U
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#define PM_FUNC_REQ_SYS_IF_POWER_MODE 18U
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#define PM_FUNC_SET_CLOCK_RATE 5U
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#define PM_FUNC_GET_CLOCK_RATE 6U
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#define PM_FUNC_CLOCK_ENABLE 7U
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#define PM_FUNC_SET_CLOCK_PARENT 14U
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#define PM_FUNC_GET_CLOCK_PARENT 15U
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#define PM_FUNC_RESET 13U
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#define PM_FUNC_RESET_REASON 10U
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#define PM_FUNC_BOOT 8U
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#define PM_FUNC_REBOOT 9U
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#define PM_FUNC_REBOOT_PARTITION 12U
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#define PM_FUNC_CPU_START 11U
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#define PM_FUNC_IS_PARTITION_STARTED 24U
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/* MISC RPC */
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#define MISC_FUNC_UNKNOWN 0
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#define MISC_FUNC_SET_CONTROL 1U
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#define MISC_FUNC_GET_CONTROL 2U
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#define MISC_FUNC_SET_MAX_DMA_GROUP 4U
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#define MISC_FUNC_SET_DMA_GROUP 5U
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#define MISC_FUNC_SECO_IMAGE_LOAD 8U
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#define MISC_FUNC_SECO_AUTHENTICATE 9U
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#define MISC_FUNC_SECO_FUSE_WRITE 20U
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#define MISC_FUNC_SECO_ENABLE_DEBUG 21U
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#define MISC_FUNC_SECO_FORWARD_LIFECYCLE 22U
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#define MISC_FUNC_SECO_RETURN_LIFECYCLE 23U
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#define MISC_FUNC_SECO_BUILD_INFO 24U
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#define MISC_FUNC_DEBUG_OUT 10U
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#define MISC_FUNC_WAVEFORM_CAPTURE 6U
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#define MISC_FUNC_BUILD_INFO 15U
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#define MISC_FUNC_UNIQUE_ID 19U
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#define MISC_FUNC_SET_ARI 3U
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#define MISC_FUNC_BOOT_STATUS 7U
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#define MISC_FUNC_BOOT_DONE 14U
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#define MISC_FUNC_OTP_FUSE_READ 11U
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#define MISC_FUNC_OTP_FUSE_WRITE 17U
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#define MISC_FUNC_SET_TEMP 12U
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#define MISC_FUNC_GET_TEMP 13U
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#define MISC_FUNC_GET_BOOT_DEV 16U
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#define MISC_FUNC_GET_BUTTON_STATUS 18U
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/* PAD RPC */
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#define PAD_FUNC_UNKNOWN 0
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#define PAD_FUNC_SET_MUX 1U
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#define PAD_FUNC_GET_MUX 6U
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#define PAD_FUNC_SET_GP 2U
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#define PAD_FUNC_GET_GP 7U
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#define PAD_FUNC_SET_WAKEUP 4U
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#define PAD_FUNC_GET_WAKEUP 9U
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#define PAD_FUNC_SET_ALL 5U
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#define PAD_FUNC_GET_ALL 10U
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#define PAD_FUNC_SET 15U
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#define PAD_FUNC_GET 16U
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#define PAD_FUNC_SET_GP_28FDSOI 11U
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#define PAD_FUNC_GET_GP_28FDSOI 12U
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#define PAD_FUNC_SET_GP_28FDSOI_HSIC 3U
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#define PAD_FUNC_GET_GP_28FDSOI_HSIC 8U
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#define PAD_FUNC_SET_GP_28FDSOI_COMP 13U
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#define PAD_FUNC_GET_GP_28FDSOI_COMP 14U
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/* RM RPC */
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#define RM_FUNC_UNKNOWN 0
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#define RM_FUNC_PARTITION_ALLOC 1U
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#define RM_FUNC_SET_CONFIDENTIAL 31U
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#define RM_FUNC_PARTITION_FREE 2U
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#define RM_FUNC_GET_DID 26U
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#define RM_FUNC_PARTITION_STATIC 3U
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#define RM_FUNC_PARTITION_LOCK 4U
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#define RM_FUNC_GET_PARTITION 5U
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#define RM_FUNC_SET_PARENT 6U
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#define RM_FUNC_MOVE_ALL 7U
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#define RM_FUNC_ASSIGN_RESOURCE 8U
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#define RM_FUNC_SET_RESOURCE_MOVABLE 9U
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#define RM_FUNC_SET_SUBSYS_RSRC_MOVABLE 28U
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#define RM_FUNC_SET_MASTER_ATTRIBUTES 10U
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#define RM_FUNC_SET_MASTER_SID 11U
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#define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U
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#define RM_FUNC_IS_RESOURCE_OWNED 13U
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#define RM_FUNC_GET_RESOURCE_OWNER 33U
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#define RM_FUNC_IS_RESOURCE_MASTER 14U
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#define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U
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#define RM_FUNC_GET_RESOURCE_INFO 16U
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#define RM_FUNC_MEMREG_ALLOC 17U
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#define RM_FUNC_MEMREG_SPLIT 29U
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#define RM_FUNC_MEMREG_FREE 18U
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#define RM_FUNC_FIND_MEMREG 30U
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#define RM_FUNC_ASSIGN_MEMREG 19U
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#define RM_FUNC_SET_MEMREG_PERMISSIONS 20U
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#define RM_FUNC_IS_MEMREG_OWNED 21U
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#define RM_FUNC_GET_MEMREG_INFO 22U
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#define RM_FUNC_ASSIGN_PAD 23U
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#define RM_FUNC_SET_PAD_MOVABLE 24U
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#define RM_FUNC_IS_PAD_OWNED 25U
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#define RM_FUNC_DUMP 27U
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/* SECO RPC */
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#define SECO_FUNC_UNKNOWN 0
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#define SECO_FUNC_IMAGE_LOAD 1U
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#define SECO_FUNC_AUTHENTICATE 2U
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#define SECO_FUNC_FORWARD_LIFECYCLE 3U
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#define SECO_FUNC_RETURN_LIFECYCLE 4U
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#define SECO_FUNC_COMMIT 5U
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#define SECO_FUNC_ATTEST_MODE 6U
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#define SECO_FUNC_ATTEST 7U
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#define SECO_FUNC_GET_ATTEST_PKEY 8U
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#define SECO_FUNC_GET_ATTEST_SIGN 9U
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#define SECO_FUNC_ATTEST_VERIFY 10U
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#define SECO_FUNC_GEN_KEY_BLOB 11U
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#define SECO_FUNC_LOAD_KEY 12U
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#define SECO_FUNC_GET_MP_KEY 13U
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#define SECO_FUNC_UPDATE_MPMR 14U
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#define SECO_FUNC_GET_MP_SIGN 15U
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#define SECO_FUNC_BUILD_INFO 16U
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#define SECO_FUNC_CHIP_INFO 17U
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#define SECO_FUNC_ENABLE_DEBUG 18U
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#define SECO_FUNC_GET_EVENT 19U
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#define SECO_FUNC_FUSE_WRITE 20U
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#endif /* SC_RPC_H */
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