135 lines
3.5 KiB
C
135 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Xilinx Zynq MPSoC Mailbox driver
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*
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* Copyright (C) 2018-2019 Xilinx, Inc.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <mailbox-uclass.h>
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#include <mach/sys_proto.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <wait_bit.h>
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/* IPI bitmasks, register base */
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/* TODO: move reg base to DT */
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#define IPI_BIT_MASK_PMU0 0x10000
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#define IPI_INT_REG_BASE_APU 0xFF300000
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struct ipi_int_regs {
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u32 trig; /* 0x0 */
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u32 obs; /* 0x4 */
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u32 ist; /* 0x8 */
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u32 imr; /* 0xC */
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u32 ier; /* 0x10 */
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u32 idr; /* 0x14 */
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};
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#define ipi_int_apu ((struct ipi_int_regs *)IPI_INT_REG_BASE_APU)
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struct zynqmp_ipi {
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void __iomem *local_req_regs;
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void __iomem *local_res_regs;
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void __iomem *remote_req_regs;
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void __iomem *remote_res_regs;
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};
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static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data)
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{
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const struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
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struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev);
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u32 ret;
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u32 *mbx = (u32 *)zynqmp->local_req_regs;
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for (size_t i = 0; i < msg->len; i++)
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writel(msg->buf[i], &mbx[i]);
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/* Write trigger interrupt */
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writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig);
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/* Wait until observation bit is cleared */
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ret = wait_for_bit_le32(&ipi_int_apu->obs, IPI_BIT_MASK_PMU0, false,
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100, false);
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debug("%s, send %ld bytes\n", __func__, msg->len);
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return ret;
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};
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static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data)
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{
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struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
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struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev);
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u32 *mbx = (u32 *)zynqmp->local_res_regs;
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for (size_t i = 0; i < msg->len; i++)
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msg->buf[i] = readl(&mbx[i]);
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debug("%s, recv %ld bytes\n", __func__, msg->len);
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return 0;
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};
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static int zynqmp_ipi_probe(struct udevice *dev)
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{
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struct zynqmp_ipi *zynqmp = dev_get_priv(dev);
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struct resource res;
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ofnode node;
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debug("%s(dev=%p)\n", __func__, dev);
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/* Get subnode where the regs are defined */
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/* Note IPI mailbox node needs to be the first one in DT */
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node = ofnode_first_subnode(dev_ofnode(dev));
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if (ofnode_read_resource_byname(node, "local_request_region", &res)) {
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dev_err(dev, "No reg property for local_request_region\n");
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return -EINVAL;
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};
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zynqmp->local_req_regs = devm_ioremap(dev, res.start,
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(res.start - res.end));
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if (ofnode_read_resource_byname(node, "local_response_region", &res)) {
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dev_err(dev, "No reg property for local_response_region\n");
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return -EINVAL;
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};
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zynqmp->local_res_regs = devm_ioremap(dev, res.start,
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(res.start - res.end));
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if (ofnode_read_resource_byname(node, "remote_request_region", &res)) {
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dev_err(dev, "No reg property for remote_request_region\n");
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return -EINVAL;
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};
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zynqmp->remote_req_regs = devm_ioremap(dev, res.start,
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(res.start - res.end));
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if (ofnode_read_resource_byname(node, "remote_response_region", &res)) {
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dev_err(dev, "No reg property for remote_response_region\n");
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return -EINVAL;
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};
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zynqmp->remote_res_regs = devm_ioremap(dev, res.start,
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(res.start - res.end));
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return 0;
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};
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static const struct udevice_id zynqmp_ipi_ids[] = {
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{ .compatible = "xlnx,zynqmp-ipi-mailbox" },
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{ }
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};
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struct mbox_ops zynqmp_ipi_mbox_ops = {
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.send = zynqmp_ipi_send,
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.recv = zynqmp_ipi_recv,
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};
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U_BOOT_DRIVER(zynqmp_ipi) = {
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.name = "zynqmp-ipi",
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.id = UCLASS_MAILBOX,
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.of_match = zynqmp_ipi_ids,
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.probe = zynqmp_ipi_probe,
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.priv_auto_alloc_size = sizeof(struct zynqmp_ipi),
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.ops = &zynqmp_ipi_mbox_ops,
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};
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