42 lines
1.3 KiB
C
42 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* Copyright 2015 ATS Advanced Telematics Systems GmbH
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* Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
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*/
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#include <common.h>
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#include <command.h>
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/*
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* ARMv7M does not support ARM instruction mode. However, the
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* interworking BLX and BX instructions do encode the ARM/Thumb
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* field in bit 0. This means that when executing any Branch
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* and eXchange instruction we must set bit 0 to one to guarantee
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* that we keep the processor in Thumb instruction mode. From The
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* ARMv7-M Instruction Set A4.1.1:
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* "ARMv7-M only supports the Thumb instruction execution state,
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* therefore the value of address bit [0] must be 1 in interworking
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* instructions, otherwise a fault occurs."
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*/
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unsigned long do_go_exec(ulong (*entry)(int, char * const []),
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int argc, char * const argv[])
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{
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ulong addr = (ulong)entry | 1;
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entry = (void *)addr;
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return entry(argc, argv);
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}
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