// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright : STMicroelectronics 2018
 */

/ {
	aliases {
		gpio0 = &gpioa;
		gpio1 = &gpiob;
		gpio2 = &gpioc;
		gpio3 = &gpiod;
		gpio4 = &gpioe;
		gpio5 = &gpiof;
		gpio6 = &gpiog;
		gpio7 = &gpioh;
		gpio8 = &gpioi;
		gpio9 = &gpioj;
		gpio10 = &gpiok;
		gpio25 = &gpioz;
		pinctrl0 = &pinctrl;
		pinctrl1 = &pinctrl_z;
	};

	/* need PSCI for sysreset during board_f */
	psci {
		u-boot,dm-pre-proper;
	};

	soc {
		u-boot,dm-pre-reloc;
	};
};

&bsec {
	u-boot,dm-pre-reloc;
};

&gpioa {
	u-boot,dm-pre-reloc;
};

&gpiob {
	u-boot,dm-pre-reloc;
};

&gpioc {
	u-boot,dm-pre-reloc;
};

&gpiod {
	u-boot,dm-pre-reloc;
};

&gpioe {
	u-boot,dm-pre-reloc;
};

&gpiof {
	u-boot,dm-pre-reloc;
};

&gpiog {
	u-boot,dm-pre-reloc;
};

&gpioh {
	u-boot,dm-pre-reloc;
};

&gpioi {
	u-boot,dm-pre-reloc;
};

&gpioj {
	u-boot,dm-pre-reloc;
};

&gpiok {
	u-boot,dm-pre-reloc;
};

&gpioz {
	u-boot,dm-pre-reloc;
};

&iwdg2 {
	u-boot,dm-pre-reloc;
};

/* pre-reloc probe = reserve video frame buffer in video_reserve() */
&ltdc {
	u-boot,dm-pre-proper;
};

&pinctrl {
	u-boot,dm-pre-reloc;
};

&pinctrl_z {
	u-boot,dm-pre-reloc;
};

&pwr_regulators {
	u-boot,dm-pre-reloc;
};

&rcc {
	u-boot,dm-pre-reloc;
	#address-cells = <1>;
	#size-cells = <0>;
};

#ifdef CONFIG_STM32MP1_TRUSTED
&scmi0 {
	u-boot,dm-pre-reloc;
};

&scmi0_clk {
	u-boot,dm-pre-reloc;
};

&scmi0_mbox {
	u-boot,dm-pre-reloc;
};

&scmi0_reset {
	u-boot,dm-pre-reloc;
};

&scmi0_shm {
	u-boot,dm-pre-reloc;
};

&scmi1 {
	u-boot,dm-pre-reloc;
};

&scmi1_clk {
	u-boot,dm-pre-reloc;
};

&scmi1_mbox {
	u-boot,dm-pre-reloc;
};

&scmi1_shm {
	u-boot,dm-pre-reloc;
};

&scmi_sram {
	u-boot,dm-pre-reloc;
};
#endif

&sdmmc1 {
	compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
};

&sdmmc2 {
	compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
};

&sdmmc3 {
	compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
};

/* NO MORE USE SCMI SUPPORT for BASIC boot chain */
#ifndef CONFIG_STM32MP1_TRUSTED

#include "stm32mp15-no-scmi.dtsi"

/ {
	clocks {
		u-boot,dm-pre-reloc;

		clk_hse: clk-hse {
			u-boot,dm-pre-reloc;
		};

		clk_hsi: clk-hsi {
			u-boot,dm-pre-reloc;
		};

		clk_lse: clk-lse {
			u-boot,dm-pre-reloc;
		};

		clk_lsi: clk-lsi {
			u-boot,dm-pre-reloc;
		};

		clk_csi: clk-csi {
			u-boot,dm-pre-reloc;
		};
	};

	reboot {
		u-boot,dm-pre-reloc;
	};
};

&clk_hse {
	u-boot,dm-pre-reloc;
};

&clk_hsi {
	u-boot,dm-pre-reloc;
};

&clk_lse {
	u-boot,dm-pre-reloc;
};

&clk_lsi {
	u-boot,dm-pre-reloc;
};

&clk_csi {
	u-boot,dm-pre-reloc;
};

&cpu0_opp_table {
	u-boot,dm-spl;
	opp-650000000 {
		u-boot,dm-spl;
	};
	opp-800000000 {
		u-boot,dm-spl;
	};
};
#endif /* CONFIG_STM32MP1_TRUSTED */