61 lines
1.2 KiB
Plaintext
61 lines
1.2 KiB
Plaintext
|
Common i2c bus multiplexer/switch properties.
|
||
|
|
||
|
An i2c bus multiplexer/switch will have several child busses that are
|
||
|
numbered uniquely in a device dependent manner. The nodes for an i2c bus
|
||
|
multiplexer/switch will have one child node for each child
|
||
|
bus.
|
||
|
|
||
|
Required properties:
|
||
|
- #address-cells = <1>;
|
||
|
- #size-cells = <0>;
|
||
|
|
||
|
Required properties for child nodes:
|
||
|
- #address-cells = <1>;
|
||
|
- #size-cells = <0>;
|
||
|
- reg : The sub-bus number.
|
||
|
|
||
|
Optional properties for child nodes:
|
||
|
- Other properties specific to the multiplexer/switch hardware.
|
||
|
- Child nodes conforming to i2c bus binding
|
||
|
|
||
|
|
||
|
Example :
|
||
|
|
||
|
/*
|
||
|
An NXP pca9548 8 channel I2C multiplexer at address 0x70
|
||
|
with two NXP pca8574 GPIO expanders attached, one each to
|
||
|
ports 3 and 4.
|
||
|
*/
|
||
|
|
||
|
mux@70 {
|
||
|
compatible = "nxp,pca9548";
|
||
|
reg = <0x70>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
|
||
|
i2c@3 {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
reg = <3>;
|
||
|
|
||
|
gpio1: gpio@38 {
|
||
|
compatible = "nxp,pca8574";
|
||
|
reg = <0x38>;
|
||
|
#gpio-cells = <2>;
|
||
|
gpio-controller;
|
||
|
};
|
||
|
};
|
||
|
i2c@4 {
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <0>;
|
||
|
reg = <4>;
|
||
|
|
||
|
gpio2: gpio@38 {
|
||
|
compatible = "nxp,pca8574";
|
||
|
reg = <0x38>;
|
||
|
#gpio-cells = <2>;
|
||
|
gpio-controller;
|
||
|
};
|
||
|
};
|
||
|
};
|