63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*/
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#ifndef __DDR_H__
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#define __DDR_H__
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void erratum_a008850_post(void);
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struct board_specific_parameters {
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u32 n_ranks;
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u32 datarate_mhz_high;
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u32 rank_gb;
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u32 clk_adjust;
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u32 wrlvl_start;
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u32 wrlvl_ctl_2;
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u32 wrlvl_ctl_3;
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};
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/*
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* These tables contain all valid speeds we want to override with board
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* specific parameters. datarate_mhz_high values need to be in ascending order
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* for each n_ranks group.
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*/
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static const struct board_specific_parameters udimm0[] = {
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/*
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* memory controller 0
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* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
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* ranks| mhz| GB |adjst| start | ctl2 | ctl3
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*/
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{2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
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{2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,},
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{2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,},
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{2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,},
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{}
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};
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static const struct board_specific_parameters *udimms[] = {
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udimm0,
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};
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static const struct board_specific_parameters rdimm0[] = {
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/*
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* memory controller 0
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* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
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* ranks| mhz| GB |adjst| start | ctl2 | ctl3
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*/
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{2, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
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{2, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
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{2, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
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{1, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
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{1, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
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{1, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
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{}
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};
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static const struct board_specific_parameters *rdimms[] = {
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rdimm0,
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};
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#endif
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