120 lines
2.7 KiB
C
120 lines
2.7 KiB
C
|
// SPDX-License-Identifier: GPL-2.0+
|
||
|
|
/*
|
||
|
|
* mux.c
|
||
|
|
*
|
||
|
|
* Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
|
||
|
|
*
|
||
|
|
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||
|
|
*/
|
||
|
|
|
||
|
|
#include <common.h>
|
||
|
|
#include <i2c.h>
|
||
|
|
#include <asm/arch/sys_proto.h>
|
||
|
|
#include <asm/arch/hardware.h>
|
||
|
|
#include <asm/arch/mux.h>
|
||
|
|
#include <asm/io.h>
|
||
|
|
#include "board.h"
|
||
|
|
|
||
|
|
static struct module_pin_mux uart0_pin_mux[] = {
|
||
|
|
{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
|
||
|
|
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux uart1_pin_mux[] = {
|
||
|
|
{OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
|
||
|
|
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux uart2_pin_mux[] = {
|
||
|
|
{OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
|
||
|
|
{OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux uart3_pin_mux[] = {
|
||
|
|
{OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
|
||
|
|
{OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux uart4_pin_mux[] = {
|
||
|
|
{OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
|
||
|
|
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux uart5_pin_mux[] = {
|
||
|
|
{OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
|
||
|
|
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct module_pin_mux i2c0_pin_mux[] = {
|
||
|
|
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
|
||
|
|
PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
|
||
|
|
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
|
||
|
|
PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
|
||
|
|
{-1},
|
||
|
|
};
|
||
|
|
|
||
|
|
void enable_uart0_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart0_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart1_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart1_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart2_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart2_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart3_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart3_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart4_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart4_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart5_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(uart5_pin_mux);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_uart_pin_mux(u32 addr)
|
||
|
|
{
|
||
|
|
switch (addr) {
|
||
|
|
case CONFIG_SYS_NS16550_COM1:
|
||
|
|
enable_uart0_pin_mux();
|
||
|
|
break;
|
||
|
|
case CONFIG_SYS_NS16550_COM2:
|
||
|
|
enable_uart1_pin_mux();
|
||
|
|
break;
|
||
|
|
case CONFIG_SYS_NS16550_COM3:
|
||
|
|
enable_uart2_pin_mux();
|
||
|
|
break;
|
||
|
|
case CONFIG_SYS_NS16550_COM4:
|
||
|
|
enable_uart3_pin_mux();
|
||
|
|
break;
|
||
|
|
case CONFIG_SYS_NS16550_COM5:
|
||
|
|
enable_uart4_pin_mux();
|
||
|
|
break;
|
||
|
|
case CONFIG_SYS_NS16550_COM6:
|
||
|
|
enable_uart5_pin_mux();
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_i2c0_pin_mux(void)
|
||
|
|
{
|
||
|
|
configure_module_pin_mux(i2c0_pin_mux);
|
||
|
|
}
|