105 lines
1.6 KiB
Plaintext
105 lines
1.6 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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/dts-v1/;
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#include "mscc,jr2.dtsi"
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#include <dt-bindings/mscc/jr2_data.h>
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/ {
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model = "Serval2 NID PCB112 Reference Board";
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compatible = "mscc,serval2-pcb110", "mscc,jr2";
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aliases {
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spi0 = &spi0;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-leds {
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compatible = "gpio-leds";
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status_green {
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label = "pcb110:green:status";
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gpios = <&gpio 12 0>;
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default-state = "on";
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};
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status_red {
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label = "pcb110:red:status";
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gpios = <&gpio 13 0>;
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default-state = "off";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <18000000>; /* input clock */
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reg = <0>; /* CS0 */
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};
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};
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&sgpio {
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status = "okay";
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sgpio-ports = <0x0000ffff>;
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};
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&sgpio2 {
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status = "okay";
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sgpio-ports = <0x3fe0ffff>;
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};
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&mdio0 {
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status = "okay";
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phy16: ethernet-phy@16 {
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reg = <16>;
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};
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phy17: ethernet-phy@17 {
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reg = <17>;
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};
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phy18: ethernet-phy@18 {
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reg = <18>;
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};
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phy19: ethernet-phy@19 {
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reg = <19>;
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};
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};
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&switch {
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ethernet-ports {
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port0: port@0 {
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reg = <24>;
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phy-handle = <&phy16>;
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phys = <&serdes_hsio 24 SERDES6G(0) PHY_MODE_SGMII>;
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};
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port1: port@1 {
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reg = <25>;
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phy-handle = <&phy17>;
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phys = <&serdes_hsio 25 SERDES6G(1) PHY_MODE_SGMII>;
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};
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port2: port@2 {
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reg = <26>;
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phy-handle = <&phy18>;
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phys = <&serdes_hsio 26 SERDES6G(2) PHY_MODE_SGMII>;
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};
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port3: port@3 {
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reg = <27>;
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phy-handle = <&phy19>;
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phys = <&serdes_hsio 27 SERDES6G(3) PHY_MODE_SGMII>;
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};
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};
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};
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