318 lines
8.6 KiB
C
318 lines
8.6 KiB
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2004-2009
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* Texas Instruments Incorporated
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* Richard Woodruff <r-woodruff2@ti.com>
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* Aneesh V <aneesh@ti.com>
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* Balaji Krishnamoorthy <balajitk@ti.com>
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*/
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#ifndef _MUX_OMAP5_H_
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#define _MUX_OMAP5_H_
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#include <asm/types.h>
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#ifdef CONFIG_OFF_PADCONF
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#define OFF_PD (1 << 12)
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#define OFF_PU (3 << 12)
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#define OFF_OUT_PTD (0 << 10)
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#define OFF_OUT_PTU (2 << 10)
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#define OFF_IN (1 << 10)
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#define OFF_OUT (0 << 10)
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#define OFF_EN (1 << 9)
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#else
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#define OFF_PD (0 << 12)
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#define OFF_PU (0 << 12)
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#define OFF_OUT_PTD (0 << 10)
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#define OFF_OUT_PTU (0 << 10)
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#define OFF_IN (0 << 10)
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#define OFF_OUT (0 << 10)
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#define OFF_EN (0 << 9)
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#endif
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#define IEN (1 << 8)
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#define IDIS (0 << 8)
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#define PTU (3 << 3)
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#define PTD (1 << 3)
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#define EN (1 << 3)
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#define DIS (0 << 3)
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#define M0 0
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#define M1 1
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#define M2 2
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#define M3 3
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#define M4 4
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#define M5 5
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#define M6 6
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#define M7 7
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#define SAFE_MODE M7
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#ifdef CONFIG_OFF_PADCONF
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#define OFF_IN_PD (OFF_PD | OFF_IN | OFF_EN)
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#define OFF_IN_PU (OFF_PU | OFF_IN | OFF_EN)
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#define OFF_OUT_PD (OFF_OUT_PTD | OFF_OUT | OFF_EN)
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#define OFF_OUT_PU (OFF_OUT_PTU | OFF_OUT | OFF_EN)
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#else
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#define OFF_IN_PD 0
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#define OFF_IN_PU 0
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#define OFF_OUT_PD 0
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#define OFF_OUT_PU 0
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#endif
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#define CORE_REVISION 0x0000
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#define CORE_HWINFO 0x0004
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#define CORE_SYSCONFIG 0x0010
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#define EMMC_CLK 0x0040
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#define EMMC_CMD 0x0042
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#define EMMC_DATA0 0x0044
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#define EMMC_DATA1 0x0046
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#define EMMC_DATA2 0x0048
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#define EMMC_DATA3 0x004a
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#define EMMC_DATA4 0x004c
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#define EMMC_DATA5 0x004e
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#define EMMC_DATA6 0x0050
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#define EMMC_DATA7 0x0052
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#define C2C_CLKOUT0 0x0054
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#define C2C_CLKOUT1 0x0056
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#define C2C_CLKIN0 0x0058
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#define C2C_CLKIN1 0x005a
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#define C2C_DATAIN0 0x005c
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#define C2C_DATAIN1 0x005e
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#define C2C_DATAIN2 0x0060
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#define C2C_DATAIN3 0x0062
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#define C2C_DATAIN4 0x0064
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#define C2C_DATAIN5 0x0066
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#define C2C_DATAIN6 0x0068
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#define C2C_DATAIN7 0x006a
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#define C2C_DATAOUT0 0x006c
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#define C2C_DATAOUT1 0x006e
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#define C2C_DATAOUT2 0x0070
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#define C2C_DATAOUT3 0x0072
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#define C2C_DATAOUT4 0x0074
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#define C2C_DATAOUT5 0x0076
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#define C2C_DATAOUT6 0x0078
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#define C2C_DATAOUT7 0x007a
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#define C2C_DATA8 0x007c
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#define C2C_DATA9 0x007e
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#define C2C_DATA10 0x0080
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#define C2C_DATA11 0x0082
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#define C2C_DATA12 0x0084
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#define C2C_DATA13 0x0086
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#define C2C_DATA14 0x0088
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#define C2C_DATA15 0x008a
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#define LLIA_WAKEREQOUT 0x008c
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#define LLIB_WAKEREQOUT 0x008e
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#define HSI1_ACREADY 0x0090
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#define HSI1_CAREADY 0x0092
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#define HSI1_ACWAKE 0x0094
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#define HSI1_CAWAKE 0x0096
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#define HSI1_ACFLAG 0x0098
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#define HSI1_ACDATA 0x009a
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#define HSI1_CAFLAG 0x009c
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#define HSI1_CADATA 0x009e
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#define UART1_TX 0x00a0
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#define UART1_CTS 0x00a2
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#define UART1_RX 0x00a4
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#define UART1_RTS 0x00a6
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#define HSI2_CAREADY 0x00a8
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#define HSI2_ACREADY 0x00aa
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#define HSI2_CAWAKE 0x00ac
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#define HSI2_ACWAKE 0x00ae
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#define HSI2_CAFLAG 0x00b0
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#define HSI2_CADATA 0x00b2
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#define HSI2_ACFLAG 0x00b4
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#define HSI2_ACDATA 0x00b6
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#define UART2_RTS 0x00b8
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#define UART2_CTS 0x00ba
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#define UART2_RX 0x00bc
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#define UART2_TX 0x00be
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#define USBB1_HSIC_STROBE 0x00c0
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#define USBB1_HSIC_DATA 0x00c2
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#define USBB2_HSIC_STROBE 0x00c4
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#define USBB2_HSIC_DATA 0x00c6
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#define TIMER10_PWM_EVT 0x00c8
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#define DSIPORTA_TE0 0x00ca
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#define DSIPORTA_LANE0X 0x00cc
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#define DSIPORTA_LANE0Y 0x00ce
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#define DSIPORTA_LANE1X 0x00d0
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#define DSIPORTA_LANE1Y 0x00d2
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#define DSIPORTA_LANE2X 0x00d4
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#define DSIPORTA_LANE2Y 0x00d6
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#define DSIPORTA_LANE3X 0x00d8
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#define DSIPORTA_LANE3Y 0x00da
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#define DSIPORTA_LANE4X 0x00dc
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#define DSIPORTA_LANE4Y 0x00de
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#define DSIPORTC_LANE0X 0x00e0
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#define DSIPORTC_LANE0Y 0x00e2
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#define DSIPORTC_LANE1X 0x00e4
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#define DSIPORTC_LANE1Y 0x00e6
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#define DSIPORTC_LANE2X 0x00e8
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#define DSIPORTC_LANE2Y 0x00ea
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#define DSIPORTC_LANE3X 0x00ec
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#define DSIPORTC_LANE3Y 0x00ee
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#define DSIPORTC_LANE4X 0x00f0
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#define DSIPORTC_LANE4Y 0x00f2
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#define DSIPORTC_TE0 0x00f4
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#define TIMER9_PWM_EVT 0x00f6
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#define I2C4_SCL 0x00f8
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#define I2C4_SDA 0x00fa
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#define MCSPI2_CLK 0x00fc
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#define MCSPI2_SIMO 0x00fe
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#define MCSPI2_SOMI 0x0100
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#define MCSPI2_CS0 0x0102
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#define RFBI_DATA15 0x0104
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#define RFBI_DATA14 0x0106
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#define RFBI_DATA13 0x0108
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#define RFBI_DATA12 0x010a
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#define RFBI_DATA11 0x010c
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#define RFBI_DATA10 0x010e
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#define RFBI_DATA9 0x0110
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#define RFBI_DATA8 0x0112
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#define RFBI_DATA7 0x0114
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#define RFBI_DATA6 0x0116
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#define RFBI_DATA5 0x0118
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#define RFBI_DATA4 0x011a
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#define RFBI_DATA3 0x011c
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#define RFBI_DATA2 0x011e
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#define RFBI_DATA1 0x0120
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#define RFBI_DATA0 0x0122
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#define RFBI_WE 0x0124
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#define RFBI_CS0 0x0126
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#define RFBI_A0 0x0128
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#define RFBI_RE 0x012a
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#define RFBI_HSYNC0 0x012c
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#define RFBI_TE_VSYNC0 0x012e
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#define GPIO6_182 0x0130
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#define GPIO6_183 0x0132
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#define GPIO6_184 0x0134
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#define GPIO6_185 0x0136
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#define GPIO6_186 0x0138
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#define GPIO6_187 0x013a
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#define HDMI_CEC 0x013c
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#define HDMI_HPD 0x013e
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#define HDMI_DDC_SCL 0x0140
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#define HDMI_DDC_SDA 0x0142
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#define CSIPORTC_LANE0X 0x0144
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#define CSIPORTC_LANE0Y 0x0146
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#define CSIPORTC_LANE1X 0x0148
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#define CSIPORTC_LANE1Y 0x014a
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#define CSIPORTB_LANE0X 0x014c
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#define CSIPORTB_LANE0Y 0x014e
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#define CSIPORTB_LANE1X 0x0150
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#define CSIPORTB_LANE1Y 0x0152
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#define CSIPORTB_LANE2X 0x0154
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#define CSIPORTB_LANE2Y 0x0156
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#define CSIPORTA_LANE0X 0x0158
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#define CSIPORTA_LANE0Y 0x015a
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#define CSIPORTA_LANE1X 0x015c
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#define CSIPORTA_LANE1Y 0x015e
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#define CSIPORTA_LANE2X 0x0160
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#define CSIPORTA_LANE2Y 0x0162
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#define CSIPORTA_LANE3X 0x0164
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#define CSIPORTA_LANE3Y 0x0166
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#define CSIPORTA_LANE4X 0x0168
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#define CSIPORTA_LANE4Y 0x016a
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#define CAM_SHUTTER 0x016c
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#define CAM_STROBE 0x016e
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#define CAM_GLOBALRESET 0x0170
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#define TIMER11_PWM_EVT 0x0172
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#define TIMER5_PWM_EVT 0x0174
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#define TIMER6_PWM_EVT 0x0176
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#define TIMER8_PWM_EVT 0x0178
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#define I2C3_SCL 0x017a
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#define I2C3_SDA 0x017c
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#define GPIO8_233 0x017e
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#define GPIO8_234 0x0180
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#define ABE_CLKS 0x0182
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#define ABEDMIC_DIN1 0x0184
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#define ABEDMIC_DIN2 0x0186
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#define ABEDMIC_DIN3 0x0188
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#define ABEDMIC_CLK1 0x018a
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#define ABEDMIC_CLK2 0x018c
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#define ABEDMIC_CLK3 0x018e
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#define ABESLIMBUS1_CLOCK 0x0190
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#define ABESLIMBUS1_DATA 0x0192
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#define ABEMCBSP2_DR 0x0194
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#define ABEMCBSP2_DX 0x0196
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#define ABEMCBSP2_FSX 0x0198
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#define ABEMCBSP2_CLKX 0x019a
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#define ABEMCPDM_UL_DATA 0x019c
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#define ABEMCPDM_DL_DATA 0x019e
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#define ABEMCPDM_FRAME 0x01a0
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#define ABEMCPDM_LB_CLK 0x01a2
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#define WLSDIO_CLK 0x01a4
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#define WLSDIO_CMD 0x01a6
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#define WLSDIO_DATA0 0x01a8
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#define WLSDIO_DATA1 0x01aa
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#define WLSDIO_DATA2 0x01ac
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#define WLSDIO_DATA3 0x01ae
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#define UART5_RX 0x01b0
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#define UART5_TX 0x01b2
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#define UART5_CTS 0x01b4
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#define UART5_RTS 0x01b6
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#define I2C2_SCL 0x01b8
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#define I2C2_SDA 0x01ba
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#define MCSPI1_CLK 0x01bc
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#define MCSPI1_SOMI 0x01be
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#define MCSPI1_SIMO 0x01c0
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#define MCSPI1_CS0 0x01c2
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#define MCSPI1_CS1 0x01c4
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#define I2C5_SCL 0x01c6
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#define I2C5_SDA 0x01c8
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#define PERSLIMBUS2_CLOCK 0x01ca
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#define PERSLIMBUS2_DATA 0x01cc
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#define UART6_TX 0x01ce
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#define UART6_RX 0x01d0
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#define UART6_CTS 0x01d2
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#define UART6_RTS 0x01d4
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#define UART3_CTS_RCTX 0x01d6
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#define UART3_RTS_IRSD 0x01d8
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#define UART3_TX_IRTX 0x01da
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#define UART3_RX_IRRX 0x01dc
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#define USBB3_HSIC_STROBE 0x01de
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#define USBB3_HSIC_DATA 0x01e0
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#define SDCARD_CLK 0x01e2
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#define SDCARD_CMD 0x01e4
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#define SDCARD_DATA2 0x01e6
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#define SDCARD_DATA3 0x01e8
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#define SDCARD_DATA0 0x01ea
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#define SDCARD_DATA1 0x01ec
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#define USBD0_HS_DP 0x01ee
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#define USBD0_HS_DM 0x01f0
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#define I2C1_PMIC_SCL 0x01f2
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#define I2C1_PMIC_SDA 0x01f4
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#define USBD0_SS_RX 0x01f6
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#define LLIA_WAKEREQIN 0x0040
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#define LLIB_WAKEREQIN 0x0042
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#define DRM_EMU0 0x0044
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#define DRM_EMU1 0x0046
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#define JTAG_NTRST 0x0048
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#define JTAG_TCK 0x004a
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#define JTAG_RTCK 0x004c
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#define JTAG_TMSC 0x004e
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#define JTAG_TDI 0x0050
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#define JTAG_TDO 0x0052
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#define SYS_32K 0x0054
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#define FREF_CLK_IOREQ 0x0056
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#define FREF_CLK0_OUT 0x0058
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#define FREF_CLK1_OUT 0x005a
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#define FREF_CLK2_OUT 0x005c
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#define FREF_CLK2_REQ 0x005e
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#define FREF_CLK1_REQ 0x0060
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#define SYS_NRESPWRON 0x0062
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#define SYS_NRESWARM 0x0064
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#define SYS_PWR_REQ 0x0066
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#define SYS_NIRQ1 0x0068
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#define SYS_NIRQ2 0x006a
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#define SR_PMIC_SCL 0x006c
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#define SR_PMIC_SDA 0x006e
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#define SYS_BOOT0 0x0070
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#define SYS_BOOT1 0x0072
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#define SYS_BOOT2 0x0074
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#define SYS_BOOT3 0x0076
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#define SYS_BOOT4 0x0078
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#define SYS_BOOT5 0x007a
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||
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#endif /* _MUX_OMAP5_H_ */
|