82 lines
1.9 KiB
C
82 lines
1.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Linaro
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* Peter Griffin <peter.griffin@linaro.org>
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*/
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#ifndef __ASM_ARM_ARCH_PINMUX_H
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#define __ASM_ARM_ARCH_PINMUX_H
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#include "periph.h"
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/* iomg bit definition */
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#define MUX_M0 0
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#define MUX_M1 1
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#define MUX_M2 2
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#define MUX_M3 3
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#define MUX_M4 4
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#define MUX_M5 5
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#define MUX_M6 6
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#define MUX_M7 7
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/* iocg bit definition */
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#define PULL_MASK (3)
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#define PULL_DIS (0)
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#define PULL_UP (1 << 0)
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#define PULL_DOWN (1 << 1)
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/* drive strength definition */
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#define DRIVE_MASK (7 << 4)
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#define DRIVE1_02MA (0 << 4)
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#define DRIVE1_04MA (1 << 4)
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#define DRIVE1_08MA (2 << 4)
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#define DRIVE1_10MA (3 << 4)
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#define DRIVE2_02MA (0 << 4)
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#define DRIVE2_04MA (1 << 4)
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#define DRIVE2_08MA (2 << 4)
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#define DRIVE2_10MA (3 << 4)
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#define DRIVE3_04MA (0 << 4)
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#define DRIVE3_08MA (1 << 4)
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#define DRIVE3_12MA (2 << 4)
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#define DRIVE3_16MA (3 << 4)
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#define DRIVE3_20MA (4 << 4)
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#define DRIVE3_24MA (5 << 4)
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#define DRIVE3_32MA (6 << 4)
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#define DRIVE3_40MA (7 << 4)
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#define DRIVE4_02MA (0 << 4)
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#define DRIVE4_04MA (2 << 4)
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#define DRIVE4_08MA (4 << 4)
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#define DRIVE4_10MA (6 << 4)
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#define HI6220_PINMUX0_BASE 0xf7010000
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#define HI6220_PINMUX1_BASE 0xf7010800
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#ifndef __ASSEMBLY__
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/* maybe more registers, but highest used is 123 */
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#define REG_NUM 123
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struct hi6220_pinmux0_regs {
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uint32_t iomg[REG_NUM];
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};
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struct hi6220_pinmux1_regs {
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uint32_t iocfg[REG_NUM];
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};
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#endif
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/**
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* Configures the pinmux for a particular peripheral.
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*
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* This function will configure the peripheral pinmux along with
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* pull-up/down and drive strength.
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*
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* @param peripheral peripheral to be configured
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* @return 0 if ok, -1 on error (e.g. unsupported peripheral)
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*/
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int hi6220_pinmux_config(int peripheral);
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#endif
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