58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010
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* NVIDIA Corporation <www.nvidia.com>
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*/
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#ifndef __ASM_ARCH_TEGRA_DISPLAY_H
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#define __ASM_ARCH_TEGRA_DISPLAY_H
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/**
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* Register a new display based on device tree configuration.
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*
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* The frame buffer can be positioned by U-Boot or overridden by the fdt.
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* You should pass in the U-Boot address here, and check the contents of
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* struct fdt_disp_config to see what was actually chosen.
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*
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* @param blob Device tree blob
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* @param default_lcd_base Default address of LCD frame buffer
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* @return 0 if ok, -1 on error (unsupported bits per pixel)
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*/
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int tegra_display_probe(const void *blob, void *default_lcd_base);
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/**
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* Return the current display configuration
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*
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* @return pointer to display configuration, or NULL if there is no valid
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* config
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*/
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struct fdt_disp_config *tegra_display_get_config(void);
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/**
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* Perform the next stage of the LCD init if it is time to do so.
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*
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* LCD init can be time-consuming because of the number of delays we need
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* while waiting for the backlight power supply, etc. This function can
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* be called at various times during U-Boot operation to advance the
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* initialization of the LCD to the next stage if sufficient time has
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* passed since the last stage. It keeps track of what stage it is up to
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* and the time that it is permitted to move to the next stage.
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*
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* The final call should have wait=1 to complete the init.
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*
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* @param blob fdt blob containing LCD information
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* @param wait 1 to wait until all init is complete, and then return
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* 0 to return immediately, potentially doing nothing if it is
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* not yet time for the next init.
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*/
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int tegra_lcd_check_next_stage(const void *blob, int wait);
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/**
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* Set up the maximum LCD size so we can size the frame buffer.
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*
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* @param blob fdt blob containing LCD information
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*/
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void tegra_lcd_early_init(const void *blob);
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#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/
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