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<a name="s390-Options"></a>
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Next: <a rel="next" accesskey="n" href="s390-Characters.html#s390-Characters">s390 Characters</a>,
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Up: <a rel="up" accesskey="u" href="S_002f390_002dDependent.html#S_002f390_002dDependent">S/390-Dependent</a>
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<h4 class="subsection">9.41.1 Options</h4>
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<p><a name="index-options-for-s390-2051"></a><a name="index-s390-options-2052"></a>
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The following table lists all available s390 specific options:
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<a name="index-g_t_0040samp_007b_002dm31_007d-option_002c-s390-2053"></a>
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<a name="index-g_t_0040samp_007b_002dm64_007d-option_002c-s390-2054"></a>
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<dl><dt><code>-m31 | -m64</code><dd>Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
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<p>These options are only available with the ELF object file format, and
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require that the necessary BFD support has been included (on a 31-bit
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platform you must add –enable-64-bit-bfd on the call to the configure
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script to enable 64-bit usage and use s390x as target platform).
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<p><a name="index-g_t_0040samp_007b_002dmesa_007d-option_002c-s390-2055"></a><a name="index-g_t_0040samp_007b_002dmzarch_007d-option_002c-s390-2056"></a><br><dt><code>-mesa | -mzarch</code><dd>Select the architecture mode, either the Enterprise System Architecture
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(esa) mode or the z/Architecture mode (zarch).
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<p>The 64-bit instructions are only available with the z/Architecture mode.
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The combination of ‘<samp><span class="samp">-m64</span></samp>’ and ‘<samp><span class="samp">-mesa</span></samp>’ results in a warning
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message.
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<p><a name="index-g_t_0040samp_007b_002dmarch_003d_007d-option_002c-s390-2057"></a><br><dt><code>-march=</code><var>CPU</var><dd>This option specifies the target processor. The following processor names
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are recognized:
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<code>g5</code> (or <code>arch3</code>),
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<code>g6</code>,
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<code>z900</code> (or <code>arch5</code>),
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<code>z990</code> (or <code>arch6</code>),
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<code>z9-109</code>,
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<code>z9-ec</code> (or <code>arch7</code>),
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<code>z10</code> (or <code>arch8</code>),
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<code>z196</code> (or <code>arch9</code>),
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<code>zEC12</code> (or <code>arch10</code>),
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<code>z13</code> (or <code>arch11</code>),
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<code>z14</code> (or <code>arch12</code>), and
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<code>arch13</code>).
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<p>Assembling an instruction that is not supported on the target
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processor results in an error message.
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<p>The processor names starting with <code>arch</code> refer to the edition
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number in the Principle of Operations manual. They can be used as
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alternate processor names and have been added for compatibility with
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the IBM XL compiler.
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<p><code>arch3</code>, <code>g5</code> and <code>g6</code> cannot be used with the
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‘<samp><span class="samp">-mzarch</span></samp>’ option since the z/Architecture mode is not supported
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on these processor levels.
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<p>There is no <code>arch4</code> option supported. <code>arch4</code> matches
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<code>-march=arch5 -mesa</code>.
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<p><a name="index-g_t_0040samp_007b_002dmregnames_007d-option_002c-s390-2058"></a><br><dt><code>-mregnames</code><dd>Allow symbolic names for registers.
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<p><a name="index-g_t_0040samp_007b_002dmno_002dregnames_007d-option_002c-s390-2059"></a><br><dt><code>-mno-regnames</code><dd>Do not allow symbolic names for registers.
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<p><a name="index-g_t_0040samp_007b_002dmwarn_002dareg_002dzero_007d-option_002c-s390-2060"></a><br><dt><code>-mwarn-areg-zero</code><dd>Warn whenever the operand for a base or index register has been specified
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but evaluates to zero. This can indicate the misuse of general purpose
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register 0 as an address register.
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</dl>
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