359 lines
12 KiB
C
359 lines
12 KiB
C
/* Generated automatically by the program `genattr'
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from the machine description file `md'. */
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#ifndef GCC_INSN_ATTR_H
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#define GCC_INSN_ATTR_H
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#include "insn-attr-common.h"
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#define HAVE_ATTR_nonce_enabled 1
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extern enum attr_nonce_enabled get_attr_nonce_enabled (rtx_insn *);
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#define HAVE_ATTR_ce_enabled 1
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extern enum attr_ce_enabled get_attr_ce_enabled (rtx_insn *);
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#define HAVE_ATTR_tune 1
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extern enum attr_tune get_attr_tune (void);
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#define HAVE_ATTR_type 1
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extern enum attr_type get_attr_type (rtx_insn *);
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#define HAVE_ATTR_mul32 1
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extern enum attr_mul32 get_attr_mul32 (rtx_insn *);
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#define HAVE_ATTR_widen_mul64 1
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extern enum attr_widen_mul64 get_attr_widen_mul64 (rtx_insn *);
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#define HAVE_ATTR_is_neon_type 1
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extern enum attr_is_neon_type get_attr_is_neon_type (rtx_insn *);
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#define HAVE_ATTR_is_thumb 1
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extern enum attr_is_thumb get_attr_is_thumb (void);
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#define HAVE_ATTR_is_arch6 1
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extern enum attr_is_arch6 get_attr_is_arch6 (void);
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#define HAVE_ATTR_is_thumb1 1
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extern enum attr_is_thumb1 get_attr_is_thumb1 (void);
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#define HAVE_ATTR_predicable_short_it 1
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extern enum attr_predicable_short_it get_attr_predicable_short_it (rtx_insn *);
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#define HAVE_ATTR_enabled_for_short_it 1
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extern enum attr_enabled_for_short_it get_attr_enabled_for_short_it (rtx_insn *);
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#define HAVE_ATTR_shift 1
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extern int get_attr_shift (rtx_insn *);
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#define HAVE_ATTR_fp 1
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extern enum attr_fp get_attr_fp (rtx_insn *);
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#define HAVE_ATTR_fpu 1
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extern enum attr_fpu get_attr_fpu (void);
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#define HAVE_ATTR_predicated 1
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extern enum attr_predicated get_attr_predicated (rtx_insn *);
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#define HAVE_ATTR_length 1
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extern int get_attr_length (rtx_insn *);
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extern void shorten_branches (rtx_insn *);
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extern int insn_default_length (rtx_insn *);
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extern int insn_min_length (rtx_insn *);
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extern int insn_variable_length_p (rtx_insn *);
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extern int insn_current_length (rtx_insn *);
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#include "insn-addr.h"
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#define HAVE_ATTR_arch 1
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extern enum attr_arch get_attr_arch (rtx_insn *);
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#define HAVE_ATTR_arch_enabled 1
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extern enum attr_arch_enabled get_attr_arch_enabled (rtx_insn *);
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#define HAVE_ATTR_opt 1
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extern enum attr_opt get_attr_opt (rtx_insn *);
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#define HAVE_ATTR_opt_enabled 1
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extern enum attr_opt_enabled get_attr_opt_enabled (rtx_insn *);
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#define HAVE_ATTR_use_literal_pool 1
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extern enum attr_use_literal_pool get_attr_use_literal_pool (rtx_insn *);
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#define HAVE_ATTR_enabled 1
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extern enum attr_enabled get_attr_enabled (rtx_insn *);
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#define HAVE_ATTR_arm_pool_range 1
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extern int get_attr_arm_pool_range (rtx_insn *);
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#define HAVE_ATTR_thumb2_pool_range 1
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extern int get_attr_thumb2_pool_range (rtx_insn *);
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#define HAVE_ATTR_arm_neg_pool_range 1
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extern int get_attr_arm_neg_pool_range (rtx_insn *);
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#define HAVE_ATTR_thumb2_neg_pool_range 1
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extern int get_attr_thumb2_neg_pool_range (rtx_insn *);
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#define HAVE_ATTR_pool_range 1
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extern int get_attr_pool_range (rtx_insn *);
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#define HAVE_ATTR_neg_pool_range 1
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extern int get_attr_neg_pool_range (rtx_insn *);
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#define HAVE_ATTR_ldsched 1
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extern enum attr_ldsched get_attr_ldsched (void);
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#define HAVE_ATTR_conds 1
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extern enum attr_conds get_attr_conds (rtx_insn *);
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#define HAVE_ATTR_predicable 1
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extern enum attr_predicable get_attr_predicable (rtx_insn *);
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#define HAVE_ATTR_model_wbuf 1
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extern enum attr_model_wbuf get_attr_model_wbuf (void);
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#define HAVE_ATTR_write_conflict 1
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extern enum attr_write_conflict get_attr_write_conflict (rtx_insn *);
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#define HAVE_ATTR_core_cycles 1
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extern enum attr_core_cycles get_attr_core_cycles (rtx_insn *);
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#define HAVE_ATTR_far_jump 1
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extern enum attr_far_jump get_attr_far_jump (rtx_insn *);
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#define HAVE_ATTR_ce_count 1
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extern int get_attr_ce_count (rtx_insn *);
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#define HAVE_ATTR_tune_cortexr4 1
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extern enum attr_tune_cortexr4 get_attr_tune_cortexr4 (void);
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#define HAVE_ATTR_generic_sched 1
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extern enum attr_generic_sched get_attr_generic_sched (void);
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#define HAVE_ATTR_generic_vfp 1
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extern enum attr_generic_vfp get_attr_generic_vfp (void);
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#define HAVE_ATTR_marvell_f_iwmmxt 1
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extern enum attr_marvell_f_iwmmxt get_attr_marvell_f_iwmmxt (void);
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#define HAVE_ATTR_wmmxt_shift 1
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extern enum attr_wmmxt_shift get_attr_wmmxt_shift (rtx_insn *);
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#define HAVE_ATTR_wmmxt_pack 1
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extern enum attr_wmmxt_pack get_attr_wmmxt_pack (rtx_insn *);
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#define HAVE_ATTR_wmmxt_mult_c1 1
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extern enum attr_wmmxt_mult_c1 get_attr_wmmxt_mult_c1 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_mult_c2 1
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extern enum attr_wmmxt_mult_c2 get_attr_wmmxt_mult_c2 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_alu_c1 1
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extern enum attr_wmmxt_alu_c1 get_attr_wmmxt_alu_c1 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_alu_c2 1
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extern enum attr_wmmxt_alu_c2 get_attr_wmmxt_alu_c2 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_alu_c3 1
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extern enum attr_wmmxt_alu_c3 get_attr_wmmxt_alu_c3 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_transfer_c1 1
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extern enum attr_wmmxt_transfer_c1 get_attr_wmmxt_transfer_c1 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_transfer_c2 1
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extern enum attr_wmmxt_transfer_c2 get_attr_wmmxt_transfer_c2 (rtx_insn *);
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#define HAVE_ATTR_wmmxt_transfer_c3 1
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extern enum attr_wmmxt_transfer_c3 get_attr_wmmxt_transfer_c3 (rtx_insn *);
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#define HAVE_ATTR_vfp10 1
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extern enum attr_vfp10 get_attr_vfp10 (void);
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#define HAVE_ATTR_cortex_a7_neon_type 1
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extern enum attr_cortex_a7_neon_type get_attr_cortex_a7_neon_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a8_neon_type 1
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extern enum attr_cortex_a8_neon_type get_attr_cortex_a8_neon_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a9_neon_type 1
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extern enum attr_cortex_a9_neon_type get_attr_cortex_a9_neon_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a15_neon_type 1
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extern enum attr_cortex_a15_neon_type get_attr_cortex_a15_neon_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a17_neon_type 1
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extern enum attr_cortex_a17_neon_type get_attr_cortex_a17_neon_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a53_advsimd_type 1
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extern enum attr_cortex_a53_advsimd_type get_attr_cortex_a53_advsimd_type (rtx_insn *);
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#define HAVE_ATTR_cortex_a57_neon_type 1
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extern enum attr_cortex_a57_neon_type get_attr_cortex_a57_neon_type (rtx_insn *);
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#define HAVE_ATTR_exynos_m1_neon_type 1
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extern enum attr_exynos_m1_neon_type get_attr_exynos_m1_neon_type (rtx_insn *);
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#define HAVE_ATTR_vqh_mnem 1
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extern enum attr_vqh_mnem get_attr_vqh_mnem (rtx_insn *);
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extern int num_delay_slots (rtx_insn *);
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extern int eligible_for_delay (rtx_insn *, int, rtx_insn *, int);
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extern int const_num_delay_slots (rtx_insn *);
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#define ANNUL_IFTRUE_SLOTS 0
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extern int eligible_for_annul_true (rtx_insn *, int, rtx_insn *, int);
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#define ANNUL_IFFALSE_SLOTS 0
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extern int eligible_for_annul_false (rtx_insn *, int, rtx_insn *, int);
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/* DFA based pipeline interface. */
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#ifndef AUTOMATON_ALTS
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#define AUTOMATON_ALTS 0
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#endif
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#ifndef AUTOMATON_STATE_ALTS
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#define AUTOMATON_STATE_ALTS 0
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#endif
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#ifndef CPU_UNITS_QUERY
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#define CPU_UNITS_QUERY 0
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#endif
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#define init_sched_attrs() do { } while (0)
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/* Internal insn code number used by automata. */
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extern int internal_dfa_insn_code (rtx_insn *);
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/* Insn latency time defined in define_insn_reservation. */
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extern int insn_default_latency (rtx_insn *);
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/* Return nonzero if there is a bypass for given insn
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which is a data producer. */
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extern int bypass_p (rtx_insn *);
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/* Insn latency time on data consumed by the 2nd insn.
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Use the function if bypass_p returns nonzero for
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the 1st insn. */
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extern int insn_latency (rtx_insn *, rtx_insn *);
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/* Maximal insn latency time possible of all bypasses for this insn.
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Use the function if bypass_p returns nonzero for
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the 1st insn. */
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extern int maximal_insn_latency (rtx_insn *);
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#if AUTOMATON_ALTS
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/* The following function returns number of alternative
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reservations of given insn. It may be used for better
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insns scheduling heuristics. */
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extern int insn_alts (rtx);
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#endif
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/* Maximal possible number of insns waiting results being
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produced by insns whose execution is not finished. */
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extern const int max_insn_queue_index;
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/* Pointer to data describing current state of DFA. */
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typedef void *state_t;
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/* Size of the data in bytes. */
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extern int state_size (void);
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/* Initiate given DFA state, i.e. Set up the state
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as all functional units were not reserved. */
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extern void state_reset (state_t);
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/* The following function returns negative value if given
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insn can be issued in processor state described by given
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DFA state. In this case, the DFA state is changed to
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reflect the current and future reservations by given
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insn. Otherwise the function returns minimal time
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delay to issue the insn. This delay may be zero
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for superscalar or VLIW processors. If the second
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parameter is NULL the function changes given DFA state
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as new processor cycle started. */
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extern int state_transition (state_t, rtx);
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#if AUTOMATON_STATE_ALTS
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/* The following function returns number of possible
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alternative reservations of given insn in given
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DFA state. It may be used for better insns scheduling
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heuristics. By default the function is defined if
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macro AUTOMATON_STATE_ALTS is defined because its
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implementation may require much memory. */
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extern int state_alts (state_t, rtx);
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#endif
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extern int min_issue_delay (state_t, rtx_insn *);
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/* The following function returns nonzero if no one insn
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can be issued in current DFA state. */
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extern int state_dead_lock_p (state_t);
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/* The function returns minimal delay of issue of the 2nd
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insn after issuing the 1st insn in given DFA state.
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The 1st insn should be issued in given state (i.e.
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state_transition should return negative value for
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the insn and the state). Data dependencies between
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the insns are ignored by the function. */
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extern int min_insn_conflict_delay (state_t, rtx_insn *, rtx_insn *);
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/* The following function outputs reservations for given
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insn as they are described in the corresponding
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define_insn_reservation. */
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extern void print_reservation (FILE *, rtx_insn *);
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#if CPU_UNITS_QUERY
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/* The following function returns code of functional unit
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with given name (see define_cpu_unit). */
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extern int get_cpu_unit_code (const char *);
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/* The following function returns nonzero if functional
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unit with given code is currently reserved in given
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DFA state. */
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extern int cpu_unit_reservation_p (state_t, int);
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#endif
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/* The following function returns true if insn
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has a dfa reservation. */
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extern bool insn_has_dfa_reservation_p (rtx_insn *);
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/* Clean insn code cache. It should be called if there
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is a chance that condition value in a
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define_insn_reservation will be changed after
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last call of dfa_start. */
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extern void dfa_clean_insn_cache (void);
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extern void dfa_clear_single_insn_cache (rtx_insn *);
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/* Initiate and finish work with DFA. They should be
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called as the first and the last interface
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functions. */
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extern void dfa_start (void);
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extern void dfa_finish (void);
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#ifndef HAVE_ATTR_length
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#define HAVE_ATTR_length 0
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#endif
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#ifndef HAVE_ATTR_enabled
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#define HAVE_ATTR_enabled 0
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#endif
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#ifndef HAVE_ATTR_preferred_for_size
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#define HAVE_ATTR_preferred_for_size 0
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#endif
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#ifndef HAVE_ATTR_preferred_for_speed
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#define HAVE_ATTR_preferred_for_speed 0
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#endif
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#if !HAVE_ATTR_length
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extern int hook_int_rtx_insn_unreachable (rtx_insn *);
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#define insn_default_length hook_int_rtx_insn_unreachable
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#define insn_min_length hook_int_rtx_insn_unreachable
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#define insn_variable_length_p hook_int_rtx_insn_unreachable
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#define insn_current_length hook_int_rtx_insn_unreachable
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#include "insn-addr.h"
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#endif
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extern int hook_int_rtx_1 (rtx);
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#if !HAVE_ATTR_enabled
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#define get_attr_enabled hook_int_rtx_1
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#endif
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#if !HAVE_ATTR_preferred_for_size
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#define get_attr_preferred_for_size hook_int_rtx_1
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#endif
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#if !HAVE_ATTR_preferred_for_speed
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#define get_attr_preferred_for_speed hook_int_rtx_1
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#endif
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#define ATTR_FLAG_forward 0x1
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#define ATTR_FLAG_backward 0x2
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#endif /* GCC_INSN_ATTR_H */
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