85 lines
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85 lines
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<title>ARM Features - Debugging with GDB</title>
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<link rel="prev" href="ARC-Features.html#ARC-Features" title="ARC Features">
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<a name="ARM-Features"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="i386-Features.html#i386-Features">i386 Features</a>,
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Previous: <a rel="previous" accesskey="p" href="ARC-Features.html#ARC-Features">ARC Features</a>,
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Up: <a rel="up" accesskey="u" href="Standard-Target-Features.html#Standard-Target-Features">Standard Target Features</a>
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<h4 class="subsection">G.5.3 ARM Features</h4>
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<p><a name="index-target-descriptions_002c-ARM-features-3660"></a>
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The ‘<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>’ feature is required for non-M-profile
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ARM targets.
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It should contain registers ‘<samp><span class="samp">r0</span></samp>’ through ‘<samp><span class="samp">r13</span></samp>’, ‘<samp><span class="samp">sp</span></samp>’,
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‘<samp><span class="samp">lr</span></samp>’, ‘<samp><span class="samp">pc</span></samp>’, and ‘<samp><span class="samp">cpsr</span></samp>’.
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<p>For M-profile targets (e.g. Cortex-M3), the ‘<samp><span class="samp">org.gnu.gdb.arm.core</span></samp>’
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feature is replaced by ‘<samp><span class="samp">org.gnu.gdb.arm.m-profile</span></samp>’. It should contain
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registers ‘<samp><span class="samp">r0</span></samp>’ through ‘<samp><span class="samp">r13</span></samp>’, ‘<samp><span class="samp">sp</span></samp>’, ‘<samp><span class="samp">lr</span></samp>’, ‘<samp><span class="samp">pc</span></samp>’,
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and ‘<samp><span class="samp">xpsr</span></samp>’.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.arm.fpa</span></samp>’ feature is optional. If present, it
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should contain registers ‘<samp><span class="samp">f0</span></samp>’ through ‘<samp><span class="samp">f7</span></samp>’ and ‘<samp><span class="samp">fps</span></samp>’.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.xscale.iwmmxt</span></samp>’ feature is optional. If present,
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it should contain at least registers ‘<samp><span class="samp">wR0</span></samp>’ through ‘<samp><span class="samp">wR15</span></samp>’ and
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‘<samp><span class="samp">wCGR0</span></samp>’ through ‘<samp><span class="samp">wCGR3</span></samp>’. The ‘<samp><span class="samp">wCID</span></samp>’, ‘<samp><span class="samp">wCon</span></samp>’,
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‘<samp><span class="samp">wCSSF</span></samp>’, and ‘<samp><span class="samp">wCASF</span></samp>’ registers are optional.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>’ feature is optional. If present, it
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should contain at least registers ‘<samp><span class="samp">d0</span></samp>’ through ‘<samp><span class="samp">d15</span></samp>’. If
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they are present, ‘<samp><span class="samp">d16</span></samp>’ through ‘<samp><span class="samp">d31</span></samp>’ should also be included.
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<span class="sc">gdb</span> will synthesize the single-precision registers from
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halves of the double-precision registers.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.arm.neon</span></samp>’ feature is optional. It does not
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need to contain registers; it instructs <span class="sc">gdb</span> to display the
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VFP double-precision registers as vectors and to synthesize the
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quad-precision registers from pairs of double-precision registers.
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If this feature is present, ‘<samp><span class="samp">org.gnu.gdb.arm.vfp</span></samp>’ must also
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be present and include 32 double-precision registers.
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