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<h4 class="subsection">9.16.6 Instruction Prefixes</h4>
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<p><a name="index-i386-instruction-prefixes-1211"></a><a name="index-instruction-prefixes_002c-i386-1212"></a><a name="index-prefixes_002c-i386-1213"></a>Instruction prefixes are used to modify the following instruction. They
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are used to repeat string instructions, to provide section overrides, to
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perform bus lock operations, and to change operand and address sizes.
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(Most instructions that normally operate on 32-bit operands will use
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16-bit operands if the instruction has an “operand size” prefix.)
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Instruction prefixes are best written on the same line as the instruction
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they act upon. For example, the ‘<samp><span class="samp">scas</span></samp>’ (scan string) instruction is
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repeated with:
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<pre class="smallexample"> repne scas %es:(%edi),%al
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</pre>
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<p>You may also place prefixes on the lines immediately preceding the
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instruction, but this circumvents checks that <code>as</code> does
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with prefixes, and will not work with all prefixes.
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<p>Here is a list of instruction prefixes:
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<p><a name="index-section-override-prefixes_002c-i386-1214"></a>
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<ul>
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<li>Section override prefixes ‘<samp><span class="samp">cs</span></samp>’, ‘<samp><span class="samp">ds</span></samp>’, ‘<samp><span class="samp">ss</span></samp>’, ‘<samp><span class="samp">es</span></samp>’,
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‘<samp><span class="samp">fs</span></samp>’, ‘<samp><span class="samp">gs</span></samp>’. These are automatically added by specifying
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using the <var>section</var>:<var>memory-operand</var> form for memory references.
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<p><a name="index-size-prefixes_002c-i386-1215"></a><li>Operand/Address size prefixes ‘<samp><span class="samp">data16</span></samp>’ and ‘<samp><span class="samp">addr16</span></samp>’
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change 32-bit operands/addresses into 16-bit operands/addresses,
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while ‘<samp><span class="samp">data32</span></samp>’ and ‘<samp><span class="samp">addr32</span></samp>’ change 16-bit ones (in a
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<code>.code16</code> section) into 32-bit operands/addresses. These prefixes
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<em>must</em> appear on the same line of code as the instruction they
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modify. For example, in a 16-bit <code>.code16</code> section, you might
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write:
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<pre class="smallexample"> addr32 jmpl *(%ebx)
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</pre>
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<p><a name="index-bus-lock-prefixes_002c-i386-1216"></a><a name="index-inhibiting-interrupts_002c-i386-1217"></a><li>The bus lock prefix ‘<samp><span class="samp">lock</span></samp>’ inhibits interrupts during execution of
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the instruction it precedes. (This is only valid with certain
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instructions; see a 80386 manual for details).
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<p><a name="index-coprocessor-wait_002c-i386-1218"></a><li>The wait for coprocessor prefix ‘<samp><span class="samp">wait</span></samp>’ waits for the coprocessor to
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complete the current instruction. This should never be needed for the
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80386/80387 combination.
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<p><a name="index-repeat-prefixes_002c-i386-1219"></a><li>The ‘<samp><span class="samp">rep</span></samp>’, ‘<samp><span class="samp">repe</span></samp>’, and ‘<samp><span class="samp">repne</span></samp>’ prefixes are added
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to string instructions to make them repeat ‘<samp><span class="samp">%ecx</span></samp>’ times (‘<samp><span class="samp">%cx</span></samp>’
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times if the current address size is 16-bits).
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<a name="index-REX-prefixes_002c-i386-1220"></a><li>The ‘<samp><span class="samp">rex</span></samp>’ family of prefixes is used by x86-64 to encode
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extensions to i386 instruction set. The ‘<samp><span class="samp">rex</span></samp>’ prefix has four
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bits — an operand size overwrite (<code>64</code>) used to change operand size
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from 32-bit to 64-bit and X, Y and Z extensions bits used to extend the
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register set.
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<p>You may write the ‘<samp><span class="samp">rex</span></samp>’ prefixes directly. The ‘<samp><span class="samp">rex64xyz</span></samp>’
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instruction emits ‘<samp><span class="samp">rex</span></samp>’ prefix with all the bits set. By omitting
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the <code>64</code>, <code>x</code>, <code>y</code> or <code>z</code> you may write other
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prefixes as well. Normally, there is no need to write the prefixes
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explicitly, since gas will automatically generate them based on the
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instruction operands.
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