70 lines
2.9 KiB
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70 lines
2.9 KiB
HTML
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<title>SH Opcodes - Using as</title>
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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<a name="SH-Opcodes"></a>
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<p>
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Previous: <a rel="previous" accesskey="p" href="SH-Directives.html#SH-Directives">SH Directives</a>,
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Up: <a rel="up" accesskey="u" href="SH_002dDependent.html#SH_002dDependent">SH-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.43.5 Opcodes</h4>
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<p><a name="index-SH-opcode-summary-2134"></a><a name="index-opcode-summary_002c-SH-2135"></a><a name="index-mnemonics_002c-SH-2136"></a><a name="index-instruction-summary_002c-SH-2137"></a>For detailed information on the SH machine instruction set, see
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<cite>SH-Microcomputer User's Manual</cite> (Renesas) or
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<cite>SH-4 32-bit CPU Core Architecture</cite> (SuperH) and
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<cite>SuperH (SH) 64-Bit RISC Series</cite> (SuperH).
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<p><code>as</code> implements all the standard SH opcodes. No additional
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pseudo-instructions are needed on this family. Note, however, that
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because <code>as</code> supports a simpler form of PC-relative
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addressing, you may simply write (for example)
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<pre class="example"> mov.l bar,r0
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</pre>
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<p class="noindent">where other assemblers might require an explicit displacement to
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<code>bar</code> from the program counter:
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<pre class="example"> mov.l @(<var>disp</var>, PC)
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</pre>
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<!-- Copyright (C) 1991-2019 Free Software Foundation, Inc. -->
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