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<title>RISC-V-Options - Using as</title>
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<a name="RISC-V-Options"></a>
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<a name="RISC_002dV_002dOptions"></a>
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Next: <a rel="next" accesskey="n" href="RISC_002dV_002dDirectives.html#RISC_002dV_002dDirectives">RISC-V-Directives</a>,
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Up: <a rel="up" accesskey="u" href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent">RISC-V-Dependent</a>
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<h4 class="subsection">9.38.1 RISC-V Options</h4>
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<p>The following table lists all available RISC-V specific options.
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<!-- man begin OPTIONS -->
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<a name="index-g_t_0040samp_007b_002dfpic_007d-option_002c-RISC_002dV-1982"></a>
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<dl><dt><code>-fpic</code><dt><code>-fPIC</code><dd>Generate position-independent code
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<p><a name="index-g_t_0040samp_007b_002dfno_002dpic_007d-option_002c-RISC_002dV-1983"></a><br><dt><code>-fno-pic</code><dd>Don't generate position-independent code (default)
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<p><a name="index-g_t_0040samp_007b_002dmarch_003dISA_007d-option_002c-RISC_002dV-1984"></a><br><dt><code>-march=ISA</code><dd>Select the base isa, as specified by ISA. For example -march=rv32ima.
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<p><a name="index-g_t_0040samp_007b_002dmabi_003dABI_007d-option_002c-RISC_002dV-1985"></a><br><dt><code>-mabi=ABI</code><dd>Selects the ABI, which is either "ilp32" or "lp64", optionally followed
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by "f", "d", or "q" to indicate single-precision, double-precision, or
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quad-precision floating-point calling convention, or none to indicate
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the soft-float calling convention. Also, "ilp32" can optionally be followed
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by "e" to indicate the RVE ABI, which is always soft-float.
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<p><a name="index-g_t_0040samp_007b_002dmrelax_007d-option_002c-RISC_002dV-1986"></a><br><dt><code>-mrelax</code><dd>Take advantage of linker relaxations to reduce the number of instructions
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required to materialize symbol addresses. (default)
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<p><a name="index-g_t_0040samp_007b_002dmno_002drelax_007d-option_002c-RISC_002dV-1987"></a><br><dt><code>-mno-relax</code><dd>Don't do linker relaxations.
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</dl>
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<!-- man end -->
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