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112 lines
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<title>M68K-Moto-Syntax - Using as</title>
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<a name="M68K-Moto-Syntax"></a>
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Next: <a rel="next" accesskey="n" href="M68K_002dFloat.html#M68K_002dFloat">M68K-Float</a>,
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Previous: <a rel="previous" accesskey="p" href="M68K_002dSyntax.html#M68K_002dSyntax">M68K-Syntax</a>,
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Up: <a rel="up" accesskey="u" href="M68K_002dDependent.html#M68K_002dDependent">M68K-Dependent</a>
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<h4 class="subsection">9.22.3 Motorola Syntax</h4>
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<p><a name="index-Motorola-syntax-for-the-680x0-1427"></a><a name="index-alternate-syntax-for-the-680x0-1428"></a>
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The standard Motorola syntax for this chip differs from the syntax
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already discussed (see <a href="M68K_002dSyntax.html#M68K_002dSyntax">Syntax</a>). <code>as</code> can
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accept Motorola syntax for operands, even if <span class="sc">mit</span> syntax is used for
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other operands in the same instruction. The two kinds of syntax are
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fully compatible.
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<p>In the following table <var>apc</var> stands for any of the address registers
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(‘<samp><span class="samp">%a0</span></samp>’ through ‘<samp><span class="samp">%a7</span></samp>’), the program counter (‘<samp><span class="samp">%pc</span></samp>’), the
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zero-address relative to the program counter (‘<samp><span class="samp">%zpc</span></samp>’), or a
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suppressed address register (‘<samp><span class="samp">%za0</span></samp>’ through ‘<samp><span class="samp">%za7</span></samp>’). The use
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of <var>size</var> means one of ‘<samp><span class="samp">w</span></samp>’ or ‘<samp><span class="samp">l</span></samp>’, and it may always be
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omitted along with the leading dot. The use of <var>scale</var> means one of
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‘<samp><span class="samp">1</span></samp>’, ‘<samp><span class="samp">2</span></samp>’, ‘<samp><span class="samp">4</span></samp>’, or ‘<samp><span class="samp">8</span></samp>’, and it may always be omitted
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along with the leading asterisk.
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<p>The following additional addressing modes are understood:
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<dl>
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<dt><dfn>Address Register Indirect</dfn><dd>‘<samp><span class="samp">(%a0)</span></samp>’ through ‘<samp><span class="samp">(%a7)</span></samp>’<br>
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‘<samp><span class="samp">%a7</span></samp>’ is also known as ‘<samp><span class="samp">%sp</span></samp>’, i.e., the Stack Pointer. <code>%a6</code>
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is also known as ‘<samp><span class="samp">%fp</span></samp>’, the Frame Pointer.
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<br><dt><dfn>Address Register Postincrement</dfn><dd>‘<samp><span class="samp">(%a0)+</span></samp>’ through ‘<samp><span class="samp">(%a7)+</span></samp>’
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<br><dt><dfn>Address Register Predecrement</dfn><dd>‘<samp><span class="samp">-(%a0)</span></samp>’ through ‘<samp><span class="samp">-(%a7)</span></samp>’
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<br><dt><dfn>Indirect Plus Offset</dfn><dd>‘<samp><var>number</var><span class="samp">(</span><var>%a0</var><span class="samp">)</span></samp>’ through ‘<samp><var>number</var><span class="samp">(</span><var>%a7</var><span class="samp">)</span></samp>’,
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or ‘<samp><var>number</var><span class="samp">(</span><var>%pc</var><span class="samp">)</span></samp>’.
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<p>The <var>number</var> may also appear within the parentheses, as in
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‘<samp><span class="samp">(</span><var>number</var><span class="samp">,</span><var>%a0</var><span class="samp">)</span></samp>’. When used with the <var>pc</var>, the
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<var>number</var> may be omitted (with an address register, omitting the
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<var>number</var> produces Address Register Indirect mode).
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<br><dt><dfn>Index</dfn><dd>‘<samp><var>number</var><span class="samp">(</span><var>apc</var><span class="samp">,</span><var>register</var><span class="samp">.</span><var>size</var><span class="samp">*</span><var>scale</var><span class="samp">)</span></samp>’
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<p>The <var>number</var> may be omitted, or it may appear within the
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parentheses. The <var>apc</var> may be omitted. The <var>register</var> and the
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<var>apc</var> may appear in either order. If both <var>apc</var> and
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<var>register</var> are address registers, and the <var>size</var> and <var>scale</var>
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are omitted, then the first register is taken as the base register, and
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the second as the index register.
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<br><dt><dfn>Postindex</dfn><dd>‘<samp><span class="samp">([</span><var>number</var><span class="samp">,</span><var>apc</var><span class="samp">],</span><var>register</var><span class="samp">.</span><var>size</var><span class="samp">*</span><var>scale</var><span class="samp">,</span><var>onumber</var><span class="samp">)</span></samp>’
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<p>The <var>onumber</var>, or the <var>register</var>, or both, may be omitted.
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Either the <var>number</var> or the <var>apc</var> may be omitted, but not both.
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<br><dt><dfn>Preindex</dfn><dd>‘<samp><span class="samp">([</span><var>number</var><span class="samp">,</span><var>apc</var><span class="samp">,</span><var>register</var><span class="samp">.</span><var>size</var><span class="samp">*</span><var>scale</var><span class="samp">],</span><var>onumber</var><span class="samp">)</span></samp>’
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<p>The <var>number</var>, or the <var>apc</var>, or the <var>register</var>, or any two of
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them, may be omitted. The <var>onumber</var> may be omitted. The
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<var>register</var> and the <var>apc</var> may appear in either order. If both
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<var>apc</var> and <var>register</var> are address registers, and the <var>size</var>
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and <var>scale</var> are omitted, then the first register is taken as the
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base register, and the second as the index register.
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</dl>
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</body></html>
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