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<a name="AArch64-Extensions"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="AArch64-Syntax.html#AArch64-Syntax">AArch64 Syntax</a>,
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Previous: <a rel="previous" accesskey="p" href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>,
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Up: <a rel="up" accesskey="u" href="AArch64_002dDependent.html#AArch64_002dDependent">AArch64-Dependent</a>
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<h4 class="subsection">9.1.2 Architecture Extensions</h4>
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<p>The table below lists the permitted architecture extensions that are
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supported by the assembler and the conditions under which they are
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automatically enabled.
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<p>Multiple extensions may be specified, separated by a <code>+</code>.
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Extension mnemonics may also be removed from those the assembler
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accepts. This is done by prepending <code>no</code> to the option that adds
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the extension. Extensions that are removed must be listed after all
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extensions that have been added.
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<p>Enabling an extension that requires other extensions will
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automatically cause those extensions to be enabled. Similarly,
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disabling an extension that is required by other extensions will
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automatically cause those extensions to be disabled.
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<p><table summary=""><tr align="left"><th valign="top" width="12%">Extension </th><th valign="top" width="17%">Minimum Architecture </th><th valign="top" width="17%">Enabled by default
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</th><th valign="top" width="54%">Description
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<br></th></tr><tr align="left"><td valign="top" width="12%"><code>compnum</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">ARMv8.3-A or later
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</td><td valign="top" width="54%">Enable the complex number SIMD extensions. This implies
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<code>fp16</code> and <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>crc</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.1-A or later
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</td><td valign="top" width="54%">Enable CRC instructions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>crypto</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable cryptographic extensions. This implies <code>fp</code>, <code>simd</code>, <code>aes</code> and <code>sha2</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>aes</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the AES cryptographic extensions. This implies <code>fp</code> and <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sha2</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the SHA2 cryptographic extensions. This implies <code>fp</code> and <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sha3</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the ARMv8.2-A SHA2 and SHA3 cryptographic extensions. This implies <code>fp</code>, <code>simd</code> and <code>sha2</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sm4</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the ARMv8.2-A SM3 and SM4 cryptographic extensions. This implies <code>fp</code> and <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>fp</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8-A or later
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</td><td valign="top" width="54%">Enable floating-point extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>fp16</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">ARMv8.2-A or later
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</td><td valign="top" width="54%">Enable ARMv8.2 16-bit floating-point support. This implies
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<code>fp</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>lor</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.1-A or later
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</td><td valign="top" width="54%">Enable Limited Ordering Regions extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>lse</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.1-A or later
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</td><td valign="top" width="54%">Enable Large System extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>pan</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.1-A or later
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</td><td valign="top" width="54%">Enable Privileged Access Never support.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>profile</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable statistical profiling extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>ras</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.2-A or later
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</td><td valign="top" width="54%">Enable the Reliability, Availability and Serviceability
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extension.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>rcpc</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">ARMv8.3-A or later
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</td><td valign="top" width="54%">Enable the weak release consistency extension.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>rdma</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.1-A or later
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</td><td valign="top" width="54%">Enable ARMv8.1 Advanced SIMD extensions. This implies <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>simd</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8-A or later
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</td><td valign="top" width="54%">Enable Advanced SIMD extensions. This implies <code>fp</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the Scalable Vector Extensions. This implies <code>fp16</code>,
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<code>simd</code> and <code>compnum</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>dotprod</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">ARMv8.4-A or later
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</td><td valign="top" width="54%">Enable the Dot Product extension. This implies <code>simd</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>fp16fml</code> </td><td valign="top" width="17%">ARMv8.2-A </td><td valign="top" width="17%">ARMv8.4-A or later
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</td><td valign="top" width="54%">Enable ARMv8.2 16-bit floating-point multiplication variant support.
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This implies <code>fp16</code>.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sb</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.5-A or later
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</td><td valign="top" width="54%">Enable the speculation barrier instruction sb.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>predres</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.5-A or later
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</td><td valign="top" width="54%">Enable the Execution and Data and Prediction instructions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>rng</code> </td><td valign="top" width="17%">ARMv8.5-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable ARMv8.5-A random number instructions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>ssbs</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">ARMv8.5-A or later
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</td><td valign="top" width="54%">Enable Speculative Store Bypassing Safe state read and write.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>memtag</code> </td><td valign="top" width="17%">ARMv8.5-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable ARMv8.5-A Memory Tagging Extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>tme</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable Transactional Memory Extensions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve2</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable the SVE2 Extension.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve2-bitperm</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable SVE2 BITPERM Extension.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve2-sm4</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable SVE2 SM4 Extension.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve2-aes</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable SVE2 AES Extension. This also enables the .Q->.B form of the
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<code>pmullt</code> and <code>pmullb</code> instructions.
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<br></td></tr><tr align="left"><td valign="top" width="12%"><code>sve2-sha3</code> </td><td valign="top" width="17%">ARMv8-A </td><td valign="top" width="17%">No
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</td><td valign="top" width="54%">Enable SVE2 SHA3 Extension.
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<br></td></tr></table>
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