The ‘org.gnu.gdb.nds32.core’ feature is required for NDS32 targets. It should contain at least registers ‘r0’ through ‘r10’, ‘r15’, ‘fp’, ‘gp’, ‘lp’, ‘sp’, and ‘pc’.
The ‘org.gnu.gdb.nds32.fpu’ feature is optional. If present, it should contain 64-bit double-precision floating-point registers ‘fd0’ through fdN, which should be ‘fd3’, ‘fd7’, ‘fd15’, or ‘fd31’ based on the FPU configuration implemented.
Note: The first sixteen 64-bit double-precision floating-point registers are overlapped with the thirty-two 32-bit single-precision floating-point registers. The 32-bit single-precision registers, if not being listed explicitly, will be synthesized from halves of the overlapping 64-bit double-precision registers. Listing 32-bit single-precision registers explicitly is deprecated, and the support to it could be totally removed some day.