100 lines
4.6 KiB
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100 lines
4.6 KiB
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<title>SPU - Debugging with GDB</title>
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<body>
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<div class="node">
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<a name="SPU"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="PowerPC.html#PowerPC">PowerPC</a>,
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Previous: <a rel="previous" accesskey="p" href="HPPA.html#HPPA">HPPA</a>,
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Up: <a rel="up" accesskey="u" href="Architectures.html#Architectures">Architectures</a>
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<hr>
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</div>
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<h4 class="subsection">21.4.6 Cell Broadband Engine SPU architecture</h4>
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<p><a name="index-Cell-Broadband-Engine-1635"></a><a name="index-SPU-1636"></a>
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When <span class="sc">gdb</span> is debugging the Cell Broadband Engine SPU architecture,
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it provides the following special commands:
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<dl>
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<dt><code>info spu event</code><dd><a name="index-info-spu-1637"></a>Display SPU event facility status. Shows current event mask
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and pending event status.
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<br><dt><code>info spu signal</code><dd>Display SPU signal notification facility status. Shows pending
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signal-control word and signal notification mode of both signal
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notification channels.
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<br><dt><code>info spu mailbox</code><dd>Display SPU mailbox facility status. Shows all pending entries,
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in order of processing, in each of the SPU Write Outbound,
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SPU Write Outbound Interrupt, and SPU Read Inbound mailboxes.
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<br><dt><code>info spu dma</code><dd>Display MFC DMA status. Shows all pending commands in the MFC
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DMA queue. For each entry, opcode, tag, class IDs, effective
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and local store addresses and transfer size are shown.
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<br><dt><code>info spu proxydma</code><dd>Display MFC Proxy-DMA status. Shows all pending commands in the MFC
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Proxy-DMA queue. For each entry, opcode, tag, class IDs, effective
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and local store addresses and transfer size are shown.
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</dl>
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<p>When <span class="sc">gdb</span> is debugging a combined PowerPC/SPU application
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on the Cell Broadband Engine, it provides in addition the following
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special commands:
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<dl>
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<dt><code>set spu stop-on-load </code><var>arg</var><dd><a name="index-set-spu-1638"></a>Set whether to stop for new SPE threads. When set to <code>on</code>, <span class="sc">gdb</span>
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will give control to the user when a new SPE thread enters its <code>main</code>
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function. The default is <code>off</code>.
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<br><dt><code>show spu stop-on-load</code><dd><a name="index-show-spu-1639"></a>Show whether to stop for new SPE threads.
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<br><dt><code>set spu auto-flush-cache </code><var>arg</var><dd>Set whether to automatically flush the software-managed cache. When set to
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<code>on</code>, <span class="sc">gdb</span> will automatically cause the SPE software-managed
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cache to be flushed whenever SPE execution stops. This provides a consistent
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view of PowerPC memory that is accessed via the cache. If an application
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does not use the software-managed cache, this option has no effect.
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<br><dt><code>show spu auto-flush-cache</code><dd>Show whether to automatically flush the software-managed cache.
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</dl>
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</body></html>
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