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187 lines
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<title>M68K-Opts - Using as</title>
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<meta name="description" content="Using as">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="M68K_002dDependent.html#M68K_002dDependent" title="M68K-Dependent">
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<link rel="next" href="M68K_002dSyntax.html#M68K_002dSyntax" title="M68K-Syntax">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="M68K-Opts"></a>
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<a name="M68K_002dOpts"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="M68K_002dSyntax.html#M68K_002dSyntax">M68K-Syntax</a>,
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Up: <a rel="up" accesskey="u" href="M68K_002dDependent.html#M68K_002dDependent">M68K-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.22.1 M680x0 Options</h4>
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<p><a name="index-options_002c-M680x0-1398"></a><a name="index-M680x0-options-1399"></a>The Motorola 680x0 version of <code>as</code> has a few machine
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dependent options:
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<a name="index-g_t_0040samp_007b_002dmarch_003d_007d-command_002dline-option_002c-M680x0-1400"></a>
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<dl><dt>‘<samp><span class="samp">-march=</span><var>architecture</var></samp>’<dd>This option specifies a target architecture. The following
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architectures are recognized:
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<code>68000</code>,
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<code>68010</code>,
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<code>68020</code>,
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<code>68030</code>,
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<code>68040</code>,
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<code>68060</code>,
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<code>cpu32</code>,
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<code>isaa</code>,
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<code>isaaplus</code>,
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<code>isab</code>,
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<code>isac</code> and
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<code>cfv4e</code>.
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<p><a name="index-g_t_0040samp_007b_002dmcpu_003d_007d-command_002dline-option_002c-M680x0-1401"></a><br><dt>‘<samp><span class="samp">-mcpu=</span><var>cpu</var></samp>’<dd>This option specifies a target cpu. When used in conjunction with the
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<samp><span class="option">-march</span></samp> option, the cpu must be within the specified
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architecture. Also, the generic features of the architecture are used
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for instruction generation, rather than those of the specific chip.
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<p><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005d68851_007d-command_002dline-option_002c-M680x0-1402"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005d68881_007d-command_002dline-option_002c-M680x0-1403"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005ddiv_007d-command_002dline-option_002c-M680x0-1404"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005dusp_007d-command_002dline-option_002c-M680x0-1405"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005dfloat_007d-command_002dline-option_002c-M680x0-1406"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005dmac_007d-command_002dline-option_002c-M680x0-1407"></a><a name="index-g_t_0040samp_007b_002dm_005bno_002d_005demac_007d-command_002dline-option_002c-M680x0-1408"></a><br><dt>‘<samp><span class="samp">-m[no-]68851</span></samp>’<dt>‘<samp><span class="samp">-m[no-]68881</span></samp>’<dt>‘<samp><span class="samp">-m[no-]div</span></samp>’<dt>‘<samp><span class="samp">-m[no-]usp</span></samp>’<dt>‘<samp><span class="samp">-m[no-]float</span></samp>’<dt>‘<samp><span class="samp">-m[no-]mac</span></samp>’<dt>‘<samp><span class="samp">-m[no-]emac</span></samp>’<dd>
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Enable or disable various architecture specific features. If a chip
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or architecture by default supports an option (for instance
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<samp><span class="option">-march=isaaplus</span></samp> includes the <samp><span class="option">-mdiv</span></samp> option),
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explicitly disabling the option will override the default.
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<p><a name="index-g_t_0040samp_007b_002dl_007d-option_002c-M680x0-1409"></a><br><dt>‘<samp><span class="samp">-l</span></samp>’<dd>You can use the ‘<samp><span class="samp">-l</span></samp>’ option to shorten the size of references to undefined
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symbols. If you do not use the ‘<samp><span class="samp">-l</span></samp>’ option, references to undefined
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symbols are wide enough for a full <code>long</code> (32 bits). (Since
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<code>as</code> cannot know where these symbols end up, <code>as</code> can
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only allocate space for the linker to fill in later. Since <code>as</code>
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does not know how far away these symbols are, it allocates as much space as it
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can.) If you use this option, the references are only one word wide (16 bits).
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This may be useful if you want the object file to be as small as possible, and
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you know that the relevant symbols are always less than 17 bits away.
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<p><a name="index-g_t_0040samp_007b_002d_002dregister_002dprefix_002doptional_007d-option_002c-M680x0-1410"></a><br><dt>‘<samp><span class="samp">--register-prefix-optional</span></samp>’<dd>For some configurations, especially those where the compiler normally
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does not prepend an underscore to the names of user variables, the
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assembler requires a ‘<samp><span class="samp">%</span></samp>’ before any use of a register name. This
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is intended to let the assembler distinguish between C variables and
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functions named ‘<samp><span class="samp">a0</span></samp>’ through ‘<samp><span class="samp">a7</span></samp>’, and so on. The ‘<samp><span class="samp">%</span></samp>’ is
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always accepted, but is not required for certain configurations, notably
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‘<samp><span class="samp">sun3</span></samp>’. The ‘<samp><span class="samp">--register-prefix-optional</span></samp>’ option may be used
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to permit omitting the ‘<samp><span class="samp">%</span></samp>’ even for configurations for which it is
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normally required. If this is done, it will generally be impossible to
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refer to C variables and functions with the same names as register
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names.
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<p><a name="index-g_t_0040samp_007b_002d_002dbitwise_002dor_007d-option_002c-M680x0-1411"></a><br><dt>‘<samp><span class="samp">--bitwise-or</span></samp>’<dd>Normally the character ‘<samp><span class="samp">|</span></samp>’ is treated as a comment character, which
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means that it can not be used in expressions. The ‘<samp><span class="samp">--bitwise-or</span></samp>’
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option turns ‘<samp><span class="samp">|</span></samp>’ into a normal character. In this mode, you must
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either use C style comments, or start comments with a ‘<samp><span class="samp">#</span></samp>’ character
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at the beginning of a line.
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<p><a name="index-g_t_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d16_007d-1412"></a><a name="index-g_t_0040samp_007b_002d_002dbase_002dsize_002ddefault_002d32_007d-1413"></a><br><dt>‘<samp><span class="samp">--base-size-default-16 --base-size-default-32</span></samp>’<dd>If you use an addressing mode with a base register without specifying
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the size, <code>as</code> will normally use the full 32 bit value.
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For example, the addressing mode ‘<samp><span class="samp">%a0@(%d0)</span></samp>’ is equivalent to
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‘<samp><span class="samp">%a0@(%d0:l)</span></samp>’. You may use the ‘<samp><span class="samp">--base-size-default-16</span></samp>’
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option to tell <code>as</code> to default to using the 16 bit value.
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In this case, ‘<samp><span class="samp">%a0@(%d0)</span></samp>’ is equivalent to ‘<samp><span class="samp">%a0@(%d0:w)</span></samp>’.
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You may use the ‘<samp><span class="samp">--base-size-default-32</span></samp>’ option to restore the
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default behaviour.
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<p><a name="index-g_t_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d16_007d-1414"></a><a name="index-g_t_0040samp_007b_002d_002ddisp_002dsize_002ddefault_002d32_007d-1415"></a><br><dt>‘<samp><span class="samp">--disp-size-default-16 --disp-size-default-32</span></samp>’<dd>If you use an addressing mode with a displacement, and the value of the
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displacement is not known, <code>as</code> will normally assume that
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the value is 32 bits. For example, if the symbol ‘<samp><span class="samp">disp</span></samp>’ has not
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been defined, <code>as</code> will assemble the addressing mode
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‘<samp><span class="samp">%a0@(disp,%d0)</span></samp>’ as though ‘<samp><span class="samp">disp</span></samp>’ is a 32 bit value. You may
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use the ‘<samp><span class="samp">--disp-size-default-16</span></samp>’ option to tell <code>as</code>
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to instead assume that the displacement is 16 bits. In this case,
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<code>as</code> will assemble ‘<samp><span class="samp">%a0@(disp,%d0)</span></samp>’ as though
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‘<samp><span class="samp">disp</span></samp>’ is a 16 bit value. You may use the
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‘<samp><span class="samp">--disp-size-default-32</span></samp>’ option to restore the default behaviour.
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<p><a name="index-g_t_0040samp_007b_002d_002dpcrel_007d-1416"></a><br><dt>‘<samp><span class="samp">--pcrel</span></samp>’<dd>Always keep branches PC-relative. In the M680x0 architecture all branches
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are defined as PC-relative. However, on some processors they are limited
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to word displacements maximum. When <code>as</code> needs a long branch
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that is not available, it normally emits an absolute jump instead. This
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option disables this substitution. When this option is given and no long
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branches are available, only word branches will be emitted. An error
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message will be generated if a word branch cannot reach its target. This
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option has no effect on 68020 and other processors that have long branches.
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see <a href="M68K_002dBranch.html#M68K_002dBranch">Branch Improvement</a>.
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<p><a name="index-g_t_0040samp_007b_002dm68000_007d-and-related-options-1417"></a><a name="index-architecture-options_002c-M680x0-1418"></a><a name="index-M680x0-architecture-options-1419"></a><br><dt>‘<samp><span class="samp">-m68000</span></samp>’<dd><code>as</code> can assemble code for several different members of the
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Motorola 680x0 family. The default depends upon how <code>as</code>
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was configured when it was built; normally, the default is to assemble
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code for the 68020 microprocessor. The following options may be used to
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change the default. These options control which instructions and
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addressing modes are permitted. The members of the 680x0 family are
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very similar. For detailed information about the differences, see the
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Motorola manuals.
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<dl>
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<dt>‘<samp><span class="samp">-m68000</span></samp>’<dt>‘<samp><span class="samp">-m68ec000</span></samp>’<dt>‘<samp><span class="samp">-m68hc000</span></samp>’<dt>‘<samp><span class="samp">-m68hc001</span></samp>’<dt>‘<samp><span class="samp">-m68008</span></samp>’<dt>‘<samp><span class="samp">-m68302</span></samp>’<dt>‘<samp><span class="samp">-m68306</span></samp>’<dt>‘<samp><span class="samp">-m68307</span></samp>’<dt>‘<samp><span class="samp">-m68322</span></samp>’<dt>‘<samp><span class="samp">-m68356</span></samp>’<dd>Assemble for the 68000. ‘<samp><span class="samp">-m68008</span></samp>’, ‘<samp><span class="samp">-m68302</span></samp>’, and so on are synonyms
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for ‘<samp><span class="samp">-m68000</span></samp>’, since the chips are the same from the point of view
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of the assembler.
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<br><dt>‘<samp><span class="samp">-m68010</span></samp>’<dd>Assemble for the 68010.
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<br><dt>‘<samp><span class="samp">-m68020</span></samp>’<dt>‘<samp><span class="samp">-m68ec020</span></samp>’<dd>Assemble for the 68020. This is normally the default.
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<br><dt>‘<samp><span class="samp">-m68030</span></samp>’<dt>‘<samp><span class="samp">-m68ec030</span></samp>’<dd>Assemble for the 68030.
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<br><dt>‘<samp><span class="samp">-m68040</span></samp>’<dt>‘<samp><span class="samp">-m68ec040</span></samp>’<dd>Assemble for the 68040.
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<br><dt>‘<samp><span class="samp">-m68060</span></samp>’<dt>‘<samp><span class="samp">-m68ec060</span></samp>’<dd>Assemble for the 68060.
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<br><dt>‘<samp><span class="samp">-mcpu32</span></samp>’<dt>‘<samp><span class="samp">-m68330</span></samp>’<dt>‘<samp><span class="samp">-m68331</span></samp>’<dt>‘<samp><span class="samp">-m68332</span></samp>’<dt>‘<samp><span class="samp">-m68333</span></samp>’<dt>‘<samp><span class="samp">-m68334</span></samp>’<dt>‘<samp><span class="samp">-m68336</span></samp>’<dt>‘<samp><span class="samp">-m68340</span></samp>’<dt>‘<samp><span class="samp">-m68341</span></samp>’<dt>‘<samp><span class="samp">-m68349</span></samp>’<dt>‘<samp><span class="samp">-m68360</span></samp>’<dd>Assemble for the CPU32 family of chips.
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<br><dt>‘<samp><span class="samp">-m5200</span></samp>’<dt>‘<samp><span class="samp">-m5202</span></samp>’<dt>‘<samp><span class="samp">-m5204</span></samp>’<dt>‘<samp><span class="samp">-m5206</span></samp>’<dt>‘<samp><span class="samp">-m5206e</span></samp>’<dt>‘<samp><span class="samp">-m521x</span></samp>’<dt>‘<samp><span class="samp">-m5249</span></samp>’<dt>‘<samp><span class="samp">-m528x</span></samp>’<dt>‘<samp><span class="samp">-m5307</span></samp>’<dt>‘<samp><span class="samp">-m5407</span></samp>’<dt>‘<samp><span class="samp">-m547x</span></samp>’<dt>‘<samp><span class="samp">-m548x</span></samp>’<dt>‘<samp><span class="samp">-mcfv4</span></samp>’<dt>‘<samp><span class="samp">-mcfv4e</span></samp>’<dd>Assemble for the ColdFire family of chips.
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<br><dt>‘<samp><span class="samp">-m68881</span></samp>’<dt>‘<samp><span class="samp">-m68882</span></samp>’<dd>Assemble 68881 floating point instructions. This is the default for the
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68020, 68030, and the CPU32. The 68040 and 68060 always support
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floating point instructions.
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<br><dt>‘<samp><span class="samp">-mno-68881</span></samp>’<dd>Do not assemble 68881 floating point instructions. This is the default
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for 68000 and the 68010. The 68040 and 68060 always support floating
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point instructions, even if this option is used.
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<br><dt>‘<samp><span class="samp">-m68851</span></samp>’<dd>Assemble 68851 MMU instructions. This is the default for the 68020,
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68030, and 68060. The 68040 accepts a somewhat different set of MMU
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instructions; ‘<samp><span class="samp">-m68851</span></samp>’ and ‘<samp><span class="samp">-m68040</span></samp>’ should not be used
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together.
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<br><dt>‘<samp><span class="samp">-mno-68851</span></samp>’<dd>Do not assemble 68851 MMU instructions. This is the default for the
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68000, 68010, and the CPU32. The 68040 accepts a somewhat different set
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of MMU instructions.
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</dl>
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</dl>
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</body></html>
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