70 lines
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70 lines
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<title>AArch64 Opcodes - Using as</title>
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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<a name="AArch64-Opcodes"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="AArch64-Mapping-Symbols.html#AArch64-Mapping-Symbols">AArch64 Mapping Symbols</a>,
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Previous: <a rel="previous" accesskey="p" href="AArch64-Directives.html#AArch64-Directives">AArch64 Directives</a>,
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Up: <a rel="up" accesskey="u" href="AArch64_002dDependent.html#AArch64_002dDependent">AArch64-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.1.6 Opcodes</h4>
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<p><a name="index-AArch64-opcodes-583"></a><a name="index-opcodes-for-AArch64-584"></a>GAS implements all the standard AArch64 opcodes. It also
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implements several pseudo opcodes, including several synthetic load
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instructions.
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<a name="index-g_t_0040code_007bLDR-reg_002c_003d_003cexpr_003e_007d-pseudo-op_002c-AArch64-585"></a>
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<dl><dt><code>LDR =</code><dd>
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<pre class="smallexample"> ldr <register> , =<expression>
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</pre>
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<p>The constant expression will be placed into the nearest literal pool (if it not
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already there) and a PC-relative LDR instruction will be generated.
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</dl>
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<p>For more information on the AArch64 instruction set and assembly language
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notation, see ‘<samp><span class="samp">ARMv8 Instruction Set Overview</span></samp>’ available at
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<a href="http://infocenter.arm.com">http://infocenter.arm.com</a>.
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</body></html>
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