134 lines
7.6 KiB
HTML
134 lines
7.6 KiB
HTML
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<title>i386 Features - Debugging with GDB</title>
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<meta name="description" content="Debugging with GDB">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Standard-Target-Features.html#Standard-Target-Features" title="Standard Target Features">
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<link rel="prev" href="ARM-Features.html#ARM-Features" title="ARM Features">
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<link rel="next" href="MicroBlaze-Features.html#MicroBlaze-Features" title="MicroBlaze Features">
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under the terms of the GNU Free Documentation License, Version 1.3 or
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<body>
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<div class="node">
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<a name="i386-Features"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="MicroBlaze-Features.html#MicroBlaze-Features">MicroBlaze Features</a>,
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Previous: <a rel="previous" accesskey="p" href="ARM-Features.html#ARM-Features">ARM Features</a>,
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Up: <a rel="up" accesskey="u" href="Standard-Target-Features.html#Standard-Target-Features">Standard Target Features</a>
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<hr>
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</div>
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<h4 class="subsection">G.5.4 i386 Features</h4>
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<p><a name="index-target-descriptions_002c-i386-features-3661"></a>
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The ‘<samp><span class="samp">org.gnu.gdb.i386.core</span></samp>’ feature is required for i386/amd64
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targets. It should describe the following registers:
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<ul>
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<li>‘<samp><span class="samp">eax</span></samp>’ through ‘<samp><span class="samp">edi</span></samp>’ plus ‘<samp><span class="samp">eip</span></samp>’ for i386
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<li>‘<samp><span class="samp">rax</span></samp>’ through ‘<samp><span class="samp">r15</span></samp>’ plus ‘<samp><span class="samp">rip</span></samp>’ for amd64
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<li>‘<samp><span class="samp">eflags</span></samp>’, ‘<samp><span class="samp">cs</span></samp>’, ‘<samp><span class="samp">ss</span></samp>’, ‘<samp><span class="samp">ds</span></samp>’, ‘<samp><span class="samp">es</span></samp>’,
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‘<samp><span class="samp">fs</span></samp>’, ‘<samp><span class="samp">gs</span></samp>’
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<li>‘<samp><span class="samp">st0</span></samp>’ through ‘<samp><span class="samp">st7</span></samp>’
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<li>‘<samp><span class="samp">fctrl</span></samp>’, ‘<samp><span class="samp">fstat</span></samp>’, ‘<samp><span class="samp">ftag</span></samp>’, ‘<samp><span class="samp">fiseg</span></samp>’, ‘<samp><span class="samp">fioff</span></samp>’,
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‘<samp><span class="samp">foseg</span></samp>’, ‘<samp><span class="samp">fooff</span></samp>’ and ‘<samp><span class="samp">fop</span></samp>’
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</ul>
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<p>The register sets may be different, depending on the target.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.sse</span></samp>’ feature is optional. It should
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describe registers:
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<ul>
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<li>‘<samp><span class="samp">xmm0</span></samp>’ through ‘<samp><span class="samp">xmm7</span></samp>’ for i386
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<li>‘<samp><span class="samp">xmm0</span></samp>’ through ‘<samp><span class="samp">xmm15</span></samp>’ for amd64
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<li>‘<samp><span class="samp">mxcsr</span></samp>’
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</ul>
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.avx</span></samp>’ feature is optional and requires the
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‘<samp><span class="samp">org.gnu.gdb.i386.sse</span></samp>’ feature. It should
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describe the upper 128 bits of <span class="sc">ymm</span> registers:
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<ul>
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<li>‘<samp><span class="samp">ymm0h</span></samp>’ through ‘<samp><span class="samp">ymm7h</span></samp>’ for i386
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<li>‘<samp><span class="samp">ymm0h</span></samp>’ through ‘<samp><span class="samp">ymm15h</span></samp>’ for amd64
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</ul>
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.mpx</span></samp>’ is an optional feature representing Intel
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Memory Protection Extension (MPX). It should describe the following registers:
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<ul>
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<li>‘<samp><span class="samp">bnd0raw</span></samp>’ through ‘<samp><span class="samp">bnd3raw</span></samp>’ for i386 and amd64.
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<li>‘<samp><span class="samp">bndcfgu</span></samp>’ and ‘<samp><span class="samp">bndstatus</span></samp>’ for i386 and amd64.
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</ul>
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.linux</span></samp>’ feature is optional. It should
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describe a single register, ‘<samp><span class="samp">orig_eax</span></samp>’.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.segments</span></samp>’ feature is optional. It should
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describe two system registers: ‘<samp><span class="samp">fs_base</span></samp>’ and ‘<samp><span class="samp">gs_base</span></samp>’.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.avx512</span></samp>’ feature is optional and requires the
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‘<samp><span class="samp">org.gnu.gdb.i386.avx</span></samp>’ feature. It should
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describe additional <span class="sc">xmm</span> registers:
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<ul>
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<li>‘<samp><span class="samp">xmm16h</span></samp>’ through ‘<samp><span class="samp">xmm31h</span></samp>’, only valid for amd64.
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</ul>
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<p>It should describe the upper 128 bits of additional <span class="sc">ymm</span> registers:
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<ul>
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<li>‘<samp><span class="samp">ymm16h</span></samp>’ through ‘<samp><span class="samp">ymm31h</span></samp>’, only valid for amd64.
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</ul>
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<p>It should
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describe the upper 256 bits of <span class="sc">zmm</span> registers:
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<ul>
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<li>‘<samp><span class="samp">zmm0h</span></samp>’ through ‘<samp><span class="samp">zmm7h</span></samp>’ for i386.
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<li>‘<samp><span class="samp">zmm0h</span></samp>’ through ‘<samp><span class="samp">zmm15h</span></samp>’ for amd64.
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</ul>
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<p>It should
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describe the additional <span class="sc">zmm</span> registers:
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<ul>
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<li>‘<samp><span class="samp">zmm16h</span></samp>’ through ‘<samp><span class="samp">zmm31h</span></samp>’, only valid for amd64.
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</ul>
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<p>The ‘<samp><span class="samp">org.gnu.gdb.i386.pkeys</span></samp>’ feature is optional. It should
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describe a single register, ‘<samp><span class="samp">pkru</span></samp>’. It is a 32-bit register
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valid for i386 and amd64.
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</body></html>
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