72 lines
4.0 KiB
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72 lines
4.0 KiB
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<title>NDS32 Features - Debugging with GDB</title>
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="Standard-Target-Features.html#Standard-Target-Features" title="Standard Target Features">
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<link rel="prev" href="M68K-Features.html#M68K-Features" title="M68K Features">
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<link rel="next" href="Nios-II-Features.html#Nios-II-Features" title="Nios II Features">
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<div class="node">
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<a name="NDS32-Features"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="Nios-II-Features.html#Nios-II-Features">Nios II Features</a>,
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Previous: <a rel="previous" accesskey="p" href="M68K-Features.html#M68K-Features">M68K Features</a>,
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Up: <a rel="up" accesskey="u" href="Standard-Target-Features.html#Standard-Target-Features">Standard Target Features</a>
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<hr>
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</div>
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<h4 class="subsection">G.5.8 NDS32 Features</h4>
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<p><a name="index-target-descriptions_002c-NDS32-features-3665"></a>
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The ‘<samp><span class="samp">org.gnu.gdb.nds32.core</span></samp>’ feature is required for NDS32
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targets. It should contain at least registers ‘<samp><span class="samp">r0</span></samp>’ through
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‘<samp><span class="samp">r10</span></samp>’, ‘<samp><span class="samp">r15</span></samp>’, ‘<samp><span class="samp">fp</span></samp>’, ‘<samp><span class="samp">gp</span></samp>’, ‘<samp><span class="samp">lp</span></samp>’, ‘<samp><span class="samp">sp</span></samp>’,
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and ‘<samp><span class="samp">pc</span></samp>’.
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<p>The ‘<samp><span class="samp">org.gnu.gdb.nds32.fpu</span></samp>’ feature is optional. If present,
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it should contain 64-bit double-precision floating-point registers
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‘<samp><span class="samp">fd0</span></samp>’ through <em>fdN</em>, which should be ‘<samp><span class="samp">fd3</span></samp>’, ‘<samp><span class="samp">fd7</span></samp>’,
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‘<samp><span class="samp">fd15</span></samp>’, or ‘<samp><span class="samp">fd31</span></samp>’ based on the FPU configuration implemented.
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<p><em>Note:</em> The first sixteen 64-bit double-precision floating-point
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registers are overlapped with the thirty-two 32-bit single-precision
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floating-point registers. The 32-bit single-precision registers, if
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not being listed explicitly, will be synthesized from halves of the
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overlapping 64-bit double-precision registers. Listing 32-bit
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single-precision registers explicitly is deprecated, and the
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support to it could be totally removed some day.
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</body></html>
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