73 lines
3.4 KiB
HTML
73 lines
3.4 KiB
HTML
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<html lang="en">
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<head>
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<title>i386-SIMD - Using as</title>
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<meta name="description" content="Using as">
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<meta name="generator" content="makeinfo 4.13">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="i386_002dDependent.html#i386_002dDependent" title="i386-Dependent">
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<link rel="prev" href="i386_002dFloat.html#i386_002dFloat" title="i386-Float">
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<link rel="next" href="i386_002dLWP.html#i386_002dLWP" title="i386-LWP">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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</head>
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<body>
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<div class="node">
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<a name="i386-SIMD"></a>
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<a name="i386_002dSIMD"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="i386_002dLWP.html#i386_002dLWP">i386-LWP</a>,
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Previous: <a rel="previous" accesskey="p" href="i386_002dFloat.html#i386_002dFloat">i386-Float</a>,
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Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.16.10 Intel's MMX and AMD's 3DNow! SIMD Operations</h4>
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<p><a name="index-MMX_002c-i386-1249"></a><a name="index-g_t3DNow_0021_002c-i386-1250"></a><a name="index-SIMD_002c-i386-1251"></a><a name="index-MMX_002c-x86_002d64-1252"></a><a name="index-g_t3DNow_0021_002c-x86_002d64-1253"></a><a name="index-SIMD_002c-x86_002d64-1254"></a>
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<code>as</code> supports Intel's MMX instruction set (SIMD
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instructions for integer data), available on Intel's Pentium MMX
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processors and Pentium II processors, AMD's K6 and K6-2 processors,
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Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!
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instruction set (SIMD instructions for 32-bit floating point data)
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available on AMD's K6-2 processor and possibly others in the future.
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<p>Currently, <code>as</code> does not support Intel's floating point
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SIMD, Katmai (KNI).
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<p>The eight 64-bit MMX operands, also used by 3DNow!, are called ‘<samp><span class="samp">%mm0</span></samp>’,
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‘<samp><span class="samp">%mm1</span></samp>’, ... ‘<samp><span class="samp">%mm7</span></samp>’. They contain eight 8-bit integers, four
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16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
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floating point values. The MMX registers cannot be used at the same time
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as the floating point stack.
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<p>See Intel and AMD documentation, keeping in mind that the operand order in
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instructions is reversed from the Intel syntax.
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</body></html>
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