144 lines
11 KiB
HTML
144 lines
11 KiB
HTML
|
<html lang="en">
|
||
|
|
<head>
|
||
|
|
<title>i386-Regs - Using as</title>
|
||
|
|
<meta http-equiv="Content-Type" content="text/html">
|
||
|
|
<meta name="description" content="Using as">
|
||
|
|
<meta name="generator" content="makeinfo 4.13">
|
||
|
|
<link title="Top" rel="start" href="index.html#Top">
|
||
|
|
<link rel="up" href="i386_002dDependent.html#i386_002dDependent" title="i386-Dependent">
|
||
|
|
<link rel="prev" href="i386_002dMnemonics.html#i386_002dMnemonics" title="i386-Mnemonics">
|
||
|
|
<link rel="next" href="i386_002dPrefixes.html#i386_002dPrefixes" title="i386-Prefixes">
|
||
|
|
<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
|
||
|
|
<!--
|
||
|
|
This file documents the GNU Assembler "as".
|
||
|
|
|
||
|
|
Copyright (C) 1991-2019 Free Software Foundation, Inc.
|
||
|
|
|
||
|
|
Permission is granted to copy, distribute and/or modify this document
|
||
|
|
under the terms of the GNU Free Documentation License, Version 1.3
|
||
|
|
or any later version published by the Free Software Foundation;
|
||
|
|
with no Invariant Sections, with no Front-Cover Texts, and with no
|
||
|
|
Back-Cover Texts. A copy of the license is included in the
|
||
|
|
section entitled ``GNU Free Documentation License''.
|
||
|
|
|
||
|
|
-->
|
||
|
|
<meta http-equiv="Content-Style-Type" content="text/css">
|
||
|
|
<style type="text/css"><!--
|
||
|
|
pre.display { font-family:inherit }
|
||
|
|
pre.format { font-family:inherit }
|
||
|
|
pre.smalldisplay { font-family:inherit; font-size:smaller }
|
||
|
|
pre.smallformat { font-family:inherit; font-size:smaller }
|
||
|
|
pre.smallexample { font-size:smaller }
|
||
|
|
pre.smalllisp { font-size:smaller }
|
||
|
|
span.sc { font-variant:small-caps }
|
||
|
|
span.roman { font-family:serif; font-weight:normal; }
|
||
|
|
span.sansserif { font-family:sans-serif; font-weight:normal; }
|
||
|
|
--></style>
|
||
|
|
</head>
|
||
|
|
<body>
|
||
|
|
<div class="node">
|
||
|
|
<a name="i386-Regs"></a>
|
||
|
|
<a name="i386_002dRegs"></a>
|
||
|
|
<p>
|
||
|
|
Next: <a rel="next" accesskey="n" href="i386_002dPrefixes.html#i386_002dPrefixes">i386-Prefixes</a>,
|
||
|
|
Previous: <a rel="previous" accesskey="p" href="i386_002dMnemonics.html#i386_002dMnemonics">i386-Mnemonics</a>,
|
||
|
|
Up: <a rel="up" accesskey="u" href="i386_002dDependent.html#i386_002dDependent">i386-Dependent</a>
|
||
|
|
<hr>
|
||
|
|
</div>
|
||
|
|
|
||
|
|
<h4 class="subsection">9.16.5 Register Naming</h4>
|
||
|
|
|
||
|
|
<p><a name="index-i386-registers-1207"></a><a name="index-registers_002c-i386-1208"></a><a name="index-x86_002d64-registers-1209"></a><a name="index-registers_002c-x86_002d64-1210"></a>Register operands are always prefixed with ‘<samp><span class="samp">%</span></samp>’. The 80386 registers
|
||
|
|
consist of
|
||
|
|
|
||
|
|
<ul>
|
||
|
|
<li>the 8 32-bit registers ‘<samp><span class="samp">%eax</span></samp>’ (the accumulator), ‘<samp><span class="samp">%ebx</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%ecx</span></samp>’, ‘<samp><span class="samp">%edx</span></samp>’, ‘<samp><span class="samp">%edi</span></samp>’, ‘<samp><span class="samp">%esi</span></samp>’, ‘<samp><span class="samp">%ebp</span></samp>’ (the
|
||
|
|
frame pointer), and ‘<samp><span class="samp">%esp</span></samp>’ (the stack pointer).
|
||
|
|
|
||
|
|
<li>the 8 16-bit low-ends of these: ‘<samp><span class="samp">%ax</span></samp>’, ‘<samp><span class="samp">%bx</span></samp>’, ‘<samp><span class="samp">%cx</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%dx</span></samp>’, ‘<samp><span class="samp">%di</span></samp>’, ‘<samp><span class="samp">%si</span></samp>’, ‘<samp><span class="samp">%bp</span></samp>’, and ‘<samp><span class="samp">%sp</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 8-bit registers: ‘<samp><span class="samp">%ah</span></samp>’, ‘<samp><span class="samp">%al</span></samp>’, ‘<samp><span class="samp">%bh</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%bl</span></samp>’, ‘<samp><span class="samp">%ch</span></samp>’, ‘<samp><span class="samp">%cl</span></samp>’, ‘<samp><span class="samp">%dh</span></samp>’, and ‘<samp><span class="samp">%dl</span></samp>’ (These
|
||
|
|
are the high-bytes and low-bytes of ‘<samp><span class="samp">%ax</span></samp>’, ‘<samp><span class="samp">%bx</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%cx</span></samp>’, and ‘<samp><span class="samp">%dx</span></samp>’)
|
||
|
|
|
||
|
|
<li>the 6 section registers ‘<samp><span class="samp">%cs</span></samp>’ (code section), ‘<samp><span class="samp">%ds</span></samp>’
|
||
|
|
(data section), ‘<samp><span class="samp">%ss</span></samp>’ (stack section), ‘<samp><span class="samp">%es</span></samp>’, ‘<samp><span class="samp">%fs</span></samp>’,
|
||
|
|
and ‘<samp><span class="samp">%gs</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 5 processor control registers ‘<samp><span class="samp">%cr0</span></samp>’, ‘<samp><span class="samp">%cr2</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%cr3</span></samp>’, ‘<samp><span class="samp">%cr4</span></samp>’, and ‘<samp><span class="samp">%cr8</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 6 debug registers ‘<samp><span class="samp">%db0</span></samp>’, ‘<samp><span class="samp">%db1</span></samp>’, ‘<samp><span class="samp">%db2</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%db3</span></samp>’, ‘<samp><span class="samp">%db6</span></samp>’, and ‘<samp><span class="samp">%db7</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 2 test registers ‘<samp><span class="samp">%tr6</span></samp>’ and ‘<samp><span class="samp">%tr7</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 floating point register stack ‘<samp><span class="samp">%st</span></samp>’ or equivalently
|
||
|
|
‘<samp><span class="samp">%st(0)</span></samp>’, ‘<samp><span class="samp">%st(1)</span></samp>’, ‘<samp><span class="samp">%st(2)</span></samp>’, ‘<samp><span class="samp">%st(3)</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%st(4)</span></samp>’, ‘<samp><span class="samp">%st(5)</span></samp>’, ‘<samp><span class="samp">%st(6)</span></samp>’, and ‘<samp><span class="samp">%st(7)</span></samp>’.
|
||
|
|
These registers are overloaded by 8 MMX registers ‘<samp><span class="samp">%mm0</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%mm1</span></samp>’, ‘<samp><span class="samp">%mm2</span></samp>’, ‘<samp><span class="samp">%mm3</span></samp>’, ‘<samp><span class="samp">%mm4</span></samp>’, ‘<samp><span class="samp">%mm5</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%mm6</span></samp>’ and ‘<samp><span class="samp">%mm7</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 128-bit SSE registers registers ‘<samp><span class="samp">%xmm0</span></samp>’, ‘<samp><span class="samp">%xmm1</span></samp>’, ‘<samp><span class="samp">%xmm2</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%xmm3</span></samp>’, ‘<samp><span class="samp">%xmm4</span></samp>’, ‘<samp><span class="samp">%xmm5</span></samp>’, ‘<samp><span class="samp">%xmm6</span></samp>’ and ‘<samp><span class="samp">%xmm7</span></samp>’.
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>The AMD x86-64 architecture extends the register set by:
|
||
|
|
|
||
|
|
<ul>
|
||
|
|
<li>enhancing the 8 32-bit registers to 64-bit: ‘<samp><span class="samp">%rax</span></samp>’ (the
|
||
|
|
accumulator), ‘<samp><span class="samp">%rbx</span></samp>’, ‘<samp><span class="samp">%rcx</span></samp>’, ‘<samp><span class="samp">%rdx</span></samp>’, ‘<samp><span class="samp">%rdi</span></samp>’,
|
||
|
|
‘<samp><span class="samp">%rsi</span></samp>’, ‘<samp><span class="samp">%rbp</span></samp>’ (the frame pointer), ‘<samp><span class="samp">%rsp</span></samp>’ (the stack
|
||
|
|
pointer)
|
||
|
|
|
||
|
|
<li>the 8 extended registers ‘<samp><span class="samp">%r8</span></samp>’–‘<samp><span class="samp">%r15</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 32-bit low ends of the extended registers: ‘<samp><span class="samp">%r8d</span></samp>’–‘<samp><span class="samp">%r15d</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 16-bit low ends of the extended registers: ‘<samp><span class="samp">%r8w</span></samp>’–‘<samp><span class="samp">%r15w</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 8-bit low ends of the extended registers: ‘<samp><span class="samp">%r8b</span></samp>’–‘<samp><span class="samp">%r15b</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 4 8-bit registers: ‘<samp><span class="samp">%sil</span></samp>’, ‘<samp><span class="samp">%dil</span></samp>’, ‘<samp><span class="samp">%bpl</span></samp>’, ‘<samp><span class="samp">%spl</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 debug registers: ‘<samp><span class="samp">%db8</span></samp>’–‘<samp><span class="samp">%db15</span></samp>’.
|
||
|
|
|
||
|
|
<li>the 8 128-bit SSE registers: ‘<samp><span class="samp">%xmm8</span></samp>’–‘<samp><span class="samp">%xmm15</span></samp>’.
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>With the AVX extensions more registers were made available:
|
||
|
|
|
||
|
|
<ul>
|
||
|
|
<li>the 16 256-bit SSE ‘<samp><span class="samp">%ymm0</span></samp>’–‘<samp><span class="samp">%ymm15</span></samp>’ (only the first 8
|
||
|
|
available in 32-bit mode). The bottom 128 bits are overlaid with the
|
||
|
|
‘<samp><span class="samp">xmm0</span></samp>’–‘<samp><span class="samp">xmm15</span></samp>’ registers.
|
||
|
|
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>The AVX2 extensions made in 64-bit mode more registers available:
|
||
|
|
|
||
|
|
<ul>
|
||
|
|
<li>the 16 128-bit registers ‘<samp><span class="samp">%xmm16</span></samp>’–‘<samp><span class="samp">%xmm31</span></samp>’ and the 16 256-bit
|
||
|
|
registers ‘<samp><span class="samp">%ymm16</span></samp>’–‘<samp><span class="samp">%ymm31</span></samp>’.
|
||
|
|
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
<p>The AVX512 extensions added the following registers:
|
||
|
|
|
||
|
|
<ul>
|
||
|
|
<li>the 32 512-bit registers ‘<samp><span class="samp">%zmm0</span></samp>’–‘<samp><span class="samp">%zmm31</span></samp>’ (only the first 8
|
||
|
|
available in 32-bit mode). The bottom 128 bits are overlaid with the
|
||
|
|
‘<samp><span class="samp">%xmm0</span></samp>’–‘<samp><span class="samp">%xmm31</span></samp>’ registers and the first 256 bits are
|
||
|
|
overlaid with the ‘<samp><span class="samp">%ymm0</span></samp>’–‘<samp><span class="samp">%ymm31</span></samp>’ registers.
|
||
|
|
|
||
|
|
<li>the 8 mask registers ‘<samp><span class="samp">%k0</span></samp>’–‘<samp><span class="samp">%k7</span></samp>’.
|
||
|
|
|
||
|
|
</ul>
|
||
|
|
|
||
|
|
</body></html>
|
||
|
|
|