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234 lines
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<html lang="en">
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<head>
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<title>BPF Opcodes - Using as</title>
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<meta name="description" content="Using as">
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<meta name="generator" content="makeinfo 4.13">
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<link title="Top" rel="start" href="index.html#Top">
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<link rel="up" href="BPF_002dDependent.html#BPF_002dDependent" title="BPF-Dependent">
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<link rel="prev" href="BPF-Directives.html#BPF-Directives" title="BPF Directives">
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<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage">
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<!--
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled ``GNU Free Documentation License''.
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--></style>
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</head>
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<body>
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<div class="node">
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<a name="BPF-Opcodes"></a>
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<p>
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Previous: <a rel="previous" accesskey="p" href="BPF-Directives.html#BPF-Directives">BPF Directives</a>,
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Up: <a rel="up" accesskey="u" href="BPF_002dDependent.html#BPF_002dDependent">BPF-Dependent</a>
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<hr>
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</div>
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<h4 class="subsection">9.7.4 Opcodes</h4>
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<p><a name="index-BPF-opcodes-869"></a><a name="index-opcodes-for-BPF-870"></a>In the instruction descriptions below the following field descriptors
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are used:
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<dl>
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<dt><code>%d</code><dd>Destination general-purpose register whose role is to be destination
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of an operation.
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<br><dt><code>%s</code><dd>Source general-purpose register whose role is to be the source of an
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operation.
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<br><dt><code>disp16</code><dd>16-bit signed PC-relative offset, measured in number of 64-bit words,
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minus one.
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<br><dt><code>disp32</code><dd>32-bit signed PC-relative offset, measured in number of 64-bit words,
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minus one.
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<br><dt><code>offset16</code><dd>Signed 16-bit immediate.
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<br><dt><code>imm32</code><dd>Signed 32-bit immediate.
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<br><dt><code>imm64</code><dd>Signed 64-bit immediate.
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</dl>
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<h5 class="subsubsec">9.7.4.1 Arithmetic instructions</h5>
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<p>The destination register in these instructions act like an
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accumulator.
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<dl>
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<dt><code>add %d, (%s|imm32)</code><dd>64-bit arithmetic addition.
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<br><dt><code>sub %d, (%s|imm32)</code><dd>64-bit arithmetic subtraction.
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<br><dt><code>mul %d, (%s|imm32)</code><dd>64-bit arithmetic multiplication.
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<br><dt><code>div %d, (%s|imm32)</code><dd>64-bit arithmetic integer division.
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<br><dt><code>mod %d, (%s|imm32)</code><dd>64-bit integer remainder.
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<br><dt><code>and %d, (%s|imm32)</code><dd>64-bit bit-wise “and” operation.
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<br><dt><code>or %d, (%s|imm32)</code><dd>64-bit bit-wise “or” operation.
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<br><dt><code>xor %d, (%s|imm32)</code><dd>64-bit bit-wise exclusive-or operation.
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<br><dt><code>lsh %d, (%s|imm32)</code><dd>64-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>rsh %d, (%s|imm32)</code><dd>64-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>arsh %d, (%s|imm32)</code><dd>64-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>neg %d</code><dd>64-bit arithmetic negation.
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<br><dt><code>mov %d, (%s|imm32)</code><dd>Move the 64-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
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in <code>%d</code>.
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</dl>
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<h5 class="subsubsec">9.7.4.2 32-bit arithmetic instructions</h5>
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<p>The destination register in these instructions act as an accumulator.
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<dl>
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<dt><code>add32 %d, (%s|imm32)</code><dd>32-bit arithmetic addition.
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<br><dt><code>sub32 %d, (%s|imm32)</code><dd>32-bit arithmetic subtraction.
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<br><dt><code>mul32 %d, (%s|imm32)</code><dd>32-bit arithmetic multiplication.
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<br><dt><code>div32 %d, (%s|imm32)</code><dd>32-bit arithmetic integer division.
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<br><dt><code>mod32 %d, (%s|imm32)</code><dd>32-bit integer remainder.
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<br><dt><code>and32 %d, (%s|imm32)</code><dd>32-bit bit-wise “and” operation.
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<br><dt><code>or32 %d, (%s|imm32)</code><dd>32-bit bit-wise “or” operation.
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<br><dt><code>xor32 %d, (%s|imm32)</code><dd>32-bit bit-wise exclusive-or operation.
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<br><dt><code>lsh32 %d, (%s|imm32)</code><dd>32-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>rsh32 %d, (%s|imm32)</code><dd>32-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>arsh32 %d, (%s|imm32)</code><dd>32-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
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<br><dt><code>neg32 %d</code><dd>32-bit arithmetic negation.
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<br><dt><code>mov32 %d, (%s|imm32)</code><dd>Move the 32-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
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in <code>%d</code>.
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</dl>
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<h5 class="subsubsec">9.7.4.3 Endianness conversion instructions</h5>
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<dl>
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<dt><code>endle %d, (8|16|32)</code><dd>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to
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little-endian.
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<br><dt><code>endbe %d, (8|16|32)</code><dd>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to big-endian.
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</dl>
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<h5 class="subsubsec">9.7.4.4 64-bit load and pseudo maps</h5>
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<dl>
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<dt><code>lddw %d, imm64</code><dd>Load the given signed 64-bit immediate, or pseudo map descriptor, to
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the destination register <code>%d</code>.
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<br><dt><code>lddw %d, %map_fd(N)</code><dd>Load the address of the given pseudo map fd <em>N</em> to the
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destination register <code>%d</code>.
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</dl>
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<h5 class="subsubsec">9.7.4.5 Load instructions for socket filters</h5>
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<p>The following instructions are intended to be used in socket filters,
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and are therefore not general-purpose: they make assumptions on the
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contents of several registers. See the file
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<samp><span class="file">Documentation/networking/filter.txt</span></samp> in the Linux kernel source
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tree for more information.
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<p>Absolute loads:
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<dl>
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<dt><code>ldabsdw imm32</code><dd>Absolute 64-bit load.
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<br><dt><code>ldabsw imm32</code><dd>Absolute 32-bit load.
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<br><dt><code>ldabsh imm32</code><dd>Absolute 16-bit load.
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<br><dt><code>ldabsb imm32</code><dd>Absolute 8-bit load.
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</dl>
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<p>Indirect loads:
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<dl>
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<dt><code>ldinddw %s, imm32</code><dd>Indirect 64-bit load.
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<br><dt><code>ldindw %s, imm32</code><dd>Indirect 32-bit load.
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<br><dt><code>ldindh %s, imm32</code><dd>Indirect 16-bit load.
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<br><dt><code>ldindb %s, imm32</code><dd>Indirect 8-bit load.
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</dl>
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<h5 class="subsubsec">9.7.4.6 Generic load/store instructions</h5>
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<p>General-purpose load and store instructions are provided for several
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word sizes.
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<p>Load to register instructions:
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<dl>
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<dt><code>ldxdw %d, [%s+offset16]</code><dd>Generic 64-bit load.
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<br><dt><code>ldxw %d, [%s+offset16]</code><dd>Generic 32-bit load.
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<br><dt><code>ldxh %d, [%s+offset16]</code><dd>Generic 16-bit load.
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<br><dt><code>ldxb %d, [%s+offset16]</code><dd>Generic 8-bit load.
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</dl>
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<p>Store from register instructions:
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<dl>
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<dt><code>stxdw [%d+offset16], %s</code><dd>Generic 64-bit store.
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<br><dt><code>stxw [%d+offset16], %s</code><dd>Generic 32-bit store.
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<br><dt><code>stxh [%d+offset16], %s</code><dd>Generic 16-bit store.
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<br><dt><code>stxb [%d+offset16], %s</code><dd>Generic 8-bit store.
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</dl>
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<p>Store from immediates instructions:
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<dl>
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<dt><code>stddw [%d+offset16], imm32</code><dd>Store immediate as 64-bit.
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<br><dt><code>stdw [%d+offset16], imm32</code><dd>Store immediate as 32-bit.
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<br><dt><code>stdh [%d+offset16], imm32</code><dd>Store immediate as 16-bit.
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<br><dt><code>stdb [%d+offset16], imm32</code><dd>Store immediate as 8-bit.
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</dl>
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<h5 class="subsubsec">9.7.4.7 Jump instructions</h5>
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<p>eBPF provides the following compare-and-jump instructions, which
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compare the values of the two given registers, or the values of a
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register and an immediate, and perform a branch in case the comparison
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holds true.
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<dl>
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<dt><code>ja %d,(%s|imm32),disp16</code><dd>Jump-always.
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<br><dt><code>jeq %d,(%s|imm32),disp16</code><dd>Jump if equal.
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<br><dt><code>jgt %d,(%s|imm32),disp16</code><dd>Jump if greater.
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<br><dt><code>jge %d,(%s|imm32),disp16</code><dd>Jump if greater or equal.
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<br><dt><code>jlt %d,(%s|imm32),disp16</code><dd>Jump if lesser.
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<br><dt><code>jle %d,(%s|imm32),disp16</code><dd>Jump if lesser or equal.
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<br><dt><code>jset %d,(%s|imm32),disp16</code><dd>Jump if signed equal.
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<br><dt><code>jne %d,(%s|imm32),disp16</code><dd>Jump if not equal.
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<br><dt><code>jsgt %d,(%s|imm32),disp16</code><dd>Jump if signed greater.
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<br><dt><code>jsge %d,(%s|imm32),disp16</code><dd>Jump if signed greater or equal.
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<br><dt><code>jslt %d,(%s|imm32),disp16</code><dd>Jump if signed lesser.
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<br><dt><code>jsle %d,(%s|imm32),disp16</code><dd>Jump if signed lesser or equal.
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</dl>
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<p>A call instruction is provided in order to perform calls to other eBPF
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functions, or to external kernel helpers:
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<dl>
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<dt><code>call (disp32|imm32)</code><dd>Jump and link to the offset <em>disp32</em>, or to the kernel helper
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function identified by <em>imm32</em>.
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</dl>
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<p>Finally:
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<dl>
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<dt><code>exit</code><dd>Terminate the eBPF program.
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</dl>
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<h5 class="subsubsec">9.7.4.8 Atomic instructions</h5>
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<p>Atomic exchange-and-add instructions are provided in two flavors: one
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for swapping 64-bit quantities and another for 32-bit quantities.
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<dl>
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<dt><code>xadddw [%d+offset16],%s</code><dd>Exchange-and-add a 64-bit value at the specified location.
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<br><dt><code>xaddw [%d+offset16],%s</code><dd>Exchange-and-add a 32-bit value at the specified location.
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</dl>
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<!-- Copyright (C) 2007-2019 Free Software Foundation, Inc. -->
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<!-- This is part of the GAS manual. -->
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<!-- For copying conditions, see the file as.texinfo. -->
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</body></html>
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