133 lines
3.3 KiB
C
133 lines
3.3 KiB
C
/*
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* Copyright (c) 2017-2020, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP1_SHARED_RESOURCES_H
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#define STM32MP1_SHARED_RESOURCES_H
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#include <stdbool.h>
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#include <common/debug.h>
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#include <drivers/st/etzpc.h>
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#define STM32MP1_SHRES_GPIOZ(i) (STM32MP1_SHRES_GPIOZ_0 + (i))
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enum stm32mp_shres {
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STM32MP1_SHRES_CRYP1,
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STM32MP1_SHRES_GPIOZ_0,
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STM32MP1_SHRES_GPIOZ_1,
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STM32MP1_SHRES_GPIOZ_2,
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STM32MP1_SHRES_GPIOZ_3,
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STM32MP1_SHRES_GPIOZ_4,
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STM32MP1_SHRES_GPIOZ_5,
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STM32MP1_SHRES_GPIOZ_6,
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STM32MP1_SHRES_GPIOZ_7,
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STM32MP1_SHRES_HASH1,
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STM32MP1_SHRES_I2C4,
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STM32MP1_SHRES_I2C6,
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STM32MP1_SHRES_IWDG1,
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STM32MP1_SHRES_MCU,
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STM32MP1_SHRES_MDMA,
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STM32MP1_SHRES_RNG1,
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STM32MP1_SHRES_RTC,
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STM32MP1_SHRES_SPI6,
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STM32MP1_SHRES_USART1,
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STM32MP1_SHRES_PLL3,
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STM32MP1_SHRES_COUNT
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};
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#ifdef IMAGE_BL32
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/* Register a peripheral as secure or non-secure based on identifier */
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void stm32mp_register_secure_periph(unsigned int id);
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void stm32mp_register_non_secure_periph(unsigned int id);
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/* Register a peripheral as secure or non-secure based on IO base address */
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void stm32mp_register_secure_periph_iomem(uintptr_t base);
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void stm32mp_register_non_secure_periph_iomem(uintptr_t base);
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/* Register a GPIO as secure or non-secure based on its bank and pin numbers */
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void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
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void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
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/*
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* Register a (non-)secure peripheral based on the ETZPC DECPROT configuration
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*/
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void stm32mp1_register_etzpc_decprot(unsigned int id,
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enum etzpc_decprot_attributes attr);
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/* Consolidate peripheral states and locknew periph registering */
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void stm32mp_lock_periph_registering(void);
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/* Get peripheral state in shared resource driver */
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bool stm32mp1_periph_is_non_secure(unsigned long id);
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bool stm32mp1_periph_is_secure(unsigned long id);
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bool stm32mp_gpio_bank_is_non_secure(unsigned int bank);
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bool stm32mp_gpio_bank_is_shared(unsigned int bank);
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bool stm32mp_nsec_can_access_clock(unsigned long clock_id);
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bool stm32mp_nsec_can_access_reset(unsigned int reset_id);
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#else /* IMAGE_BL32 */
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static inline void stm32mp_register_secure_periph(unsigned int id)
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{
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}
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static inline void stm32mp_register_non_secure_periph(unsigned int id)
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{
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}
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static inline void stm32mp_register_secure_periph_iomem(uintptr_t base)
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{
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}
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static inline void stm32mp_register_non_secure_periph_iomem(uintptr_t base)
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{
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}
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static inline void stm32mp_register_secure_gpio(unsigned int bank,
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unsigned int pin)
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{
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}
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static inline void stm32mp_register_non_secure_gpio(unsigned int bank,
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unsigned int pin)
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{
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}
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static inline void stm32mp1_register_etzpc_decprot(unsigned int id,
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enum etzpc_decprot_attributes attr)
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{
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}
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static inline void stm32mp_lock_periph_registering(void)
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{
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/* Platform is not expected to lock a non existing database */
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panic();
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}
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static inline bool stm32mp1_periph_is_non_secure(unsigned long id)
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{
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return false;
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}
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static inline bool stm32mp1_periph_is_secure(unsigned long id)
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{
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return true;
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}
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static inline bool stm32mp_gpio_bank_is_non_secure(unsigned int bank)
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{
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return false;
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}
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static inline bool stm32mp_gpio_bank_is_shared(unsigned int bank)
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{
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return false;
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}
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#endif /* IMAGE_BL32 */
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#endif /* STM32MP1_SHARED_RESOURCES_H */
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