67 lines
1.8 KiB
C
67 lines
1.8 KiB
C
/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#ifndef IO_ADDR_DEC_H
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#define IO_ADDR_DEC_H
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#include <stdint.h>
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/* There are 5 configurable cpu decoder windows. */
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#define DRAM_WIN_MAP_NUM_MAX 5
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/* Target number for dram in cpu decoder windows. */
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#define DRAM_CPU_DEC_TARGET_NUM 0
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/*
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* Not all configurable decode windows could be used for dram, some units have
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* to reserve one decode window for other unit they have to communicate with;
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* for example, DMA engineer has 3 configurable windows, but only two could be
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* for dram while the last one has to be for pcie, so for DMA, its max_dram_win
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* is 2.
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*/
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struct dec_win_config {
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uint32_t dec_reg_base; /* IO address decoder register base address */
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uint32_t win_attr; /* IO address decoder windows attributes */
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/* How many configurable dram decoder windows that this unit has; */
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uint32_t max_dram_win;
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/* The decoder windows number including remapping that this unit has */
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uint32_t max_remap;
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/* The offset between continuous decode windows
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* within the same unit, typically 0x10
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*/
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uint32_t win_offset;
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};
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struct dram_win {
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uintptr_t base_addr;
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uintptr_t win_size;
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};
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struct dram_win_map {
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int dram_win_num;
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struct dram_win dram_windows[DRAM_WIN_MAP_NUM_MAX];
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};
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/*
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* init_io_addr_dec
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*
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* This function initializes io address decoder windows by
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* cpu dram window mapping information
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*
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* @input: N/A
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* - dram_wins_map: cpu dram windows mapping
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* - io_dec_config: io address decoder windows configuration
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* - io_unit_num: io address decoder unit number
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* @output: N/A
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*
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* @return: 0 on success and others on failure
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*/
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int init_io_addr_dec(struct dram_win_map *dram_wins_map,
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struct dec_win_config *io_dec_config,
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uint32_t io_unit_num);
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#endif /* IO_ADDR_DEC_H */
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