47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
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/*
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* Copyright (c) 2019, Linaro Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <drivers/arm/gicv3.h>
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#include <drivers/arm/gic_common.h>
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#include <platform_def.h>
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#include <plat/common/platform.h>
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static const interrupt_prop_t qemu_interrupt_props[] = {
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PLATFORM_G1S_PROPS(INTR_GROUP1S),
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PLATFORM_G0_PROPS(INTR_GROUP0)
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};
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static uintptr_t qemu_rdistif_base_addrs[PLATFORM_CORE_COUNT];
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static unsigned int qemu_mpidr_to_core_pos(unsigned long mpidr)
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{
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return (unsigned int)plat_core_pos_by_mpidr(mpidr);
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}
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static const gicv3_driver_data_t qemu_gicv3_driver_data = {
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.gicd_base = GICD_BASE,
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.gicr_base = GICR_BASE,
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.interrupt_props = qemu_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props),
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.rdistif_num = PLATFORM_CORE_COUNT,
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.rdistif_base_addrs = qemu_rdistif_base_addrs,
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.mpidr_to_core_pos = qemu_mpidr_to_core_pos
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};
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void plat_qemu_gic_init(void)
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{
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gicv3_driver_init(&qemu_gicv3_driver_data);
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gicv3_distif_init();
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gicv3_rdistif_init(plat_my_core_pos());
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gicv3_cpuif_enable(plat_my_core_pos());
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}
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void qemu_pwr_gic_on_finish(void)
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{
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gicv3_rdistif_init(plat_my_core_pos());
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gicv3_cpuif_enable(plat_my_core_pos());
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}
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