67 lines
2.1 KiB
C
67 lines
2.1 KiB
C
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <string.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <mce.h>
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#include <tegra186_private.h>
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#include <tegra_def.h>
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#include <tegra_private.h>
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#define MISCREG_AA64_RST_LOW 0x2004U
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#define MISCREG_AA64_RST_HIGH 0x2008U
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#define SCRATCH_SECURE_RSV1_SCRATCH_0 0x658U
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#define SCRATCH_SECURE_RSV1_SCRATCH_1 0x65CU
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#define CPU_RESET_MODE_AA64 1U
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extern void memcpy16(void *dest, const void *src, unsigned int length);
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/*******************************************************************************
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* Setup secondary CPU vectors
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******************************************************************************/
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void plat_secondary_setup(void)
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{
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uint32_t addr_low, addr_high;
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const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params();
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uint64_t cpu_reset_handler_base, cpu_reset_handler_size;
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INFO("Setting up secondary CPU boot\n");
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/*
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* The BL31 code resides in the TZSRAM which loses state
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* when we enter System Suspend. Copy the wakeup trampoline
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* code to TZDRAM to help us exit from System Suspend.
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*/
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cpu_reset_handler_base = tegra186_get_cpu_reset_handler_base();
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cpu_reset_handler_size = tegra186_get_cpu_reset_handler_size();
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(void)memcpy16((void *)(uintptr_t)params_from_bl2->tzdram_base,
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(const void *)(uintptr_t)cpu_reset_handler_base,
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cpu_reset_handler_size);
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/* TZDRAM base will be used as the "resume" address */
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addr_low = (uint32_t)params_from_bl2->tzdram_base | CPU_RESET_MODE_AA64;
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addr_high = (uint32_t)((params_from_bl2->tzdram_base >> 32U) & 0x7ffU);
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/* write lower 32 bits first, then the upper 11 bits */
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mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_LOW, addr_low);
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mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_HIGH, addr_high);
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/* save reset vector to be used during SYSTEM_SUSPEND exit */
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mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_RESET_VECTOR_LO,
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addr_low);
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mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_RESET_VECTOR_HI,
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addr_high);
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/* update reset vector address to the CCPLEX */
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(void)mce_update_reset_vector();
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}
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