121 lines
3.1 KiB
C
121 lines
3.1 KiB
C
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/*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#ifndef MSS_IPC_DRV_H
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#define MSS_IPC_DRV_H
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#include <lib/psci/psci.h>
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#define MV_PM_FW_IPC_VERSION_MAGIC (0xCA530000) /* Do NOT change */
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/* Increament for each version */
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#define MV_PM_FW_IPC_VERSION_SEQ (0x00000001)
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#define MV_PM_FW_IPC_VERSION (MV_PM_FW_IPC_VERSION_MAGIC | \
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MV_PM_FW_IPC_VERSION_SEQ)
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#define IPC_MSG_STATE_LOC (0x0)
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#define IPC_MSG_SYNC_ID_LOC (0x4)
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#define IPC_MSG_ID_LOC (0x8)
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#define IPC_MSG_RET_CH_ID_LOC (0xC)
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#define IPC_MSG_CPU_ID_LOC (0x10)
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#define IPC_MSG_CLUSTER_ID_LOC (0x14)
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#define IPC_MSG_SYSTEM_ID_LOC (0x18)
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#define IPC_MSG_POWER_STATE_LOC (0x1C)
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#define IPC_MSG_REPLY_LOC (0x20)
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#define IPC_MSG_RESERVED_LOC (0x24)
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/* IPC initialization state */
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enum mss_pm_ipc_init_state {
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IPC_UN_INITIALIZED = 1,
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IPC_INITIALIZED = 2
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};
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/* IPC queue direction */
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enum mss_pm_ipc_init_msg_dir {
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IPC_MSG_TX = 0,
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IPC_MSG_RX = 1
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};
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/* IPC message state */
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enum mss_pm_ipc_msg_state {
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IPC_MSG_FREE = 1,
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IPC_MSG_OCCUPY = 2
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};
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/* IPC control block */
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struct mss_pm_ipc_ctrl {
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unsigned int ctrl_base_address;
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unsigned int msg_base_address;
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unsigned int num_of_channels;
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unsigned int channel_size;
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unsigned int queue_size;
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};
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/* IPC message types */
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enum mss_pm_msg_id {
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PM_IPC_MSG_CPU_SUSPEND = 1,
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PM_IPC_MSG_CPU_OFF = 2,
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PM_IPC_MSG_CPU_ON = 3,
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PM_IPC_MSG_SYSTEM_RESET = 4,
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PM_IPC_MSG_SYSTEM_SUSPEND = 5,
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PM_IPC_MAX_MSG
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};
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struct mss_pm_ipc_msg {
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unsigned int msg_sync_id; /*
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* Sync number, validate message
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* reply corresponding to message
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* received
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*/
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unsigned int msg_id; /* Message Id */
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unsigned int ret_channel_id; /* IPC channel reply */
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unsigned int cpu_id; /* CPU Id */
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unsigned int cluster_id; /* Cluster Id */
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unsigned int system_id; /* System Id */
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unsigned int power_state;
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unsigned int msg_reply; /* Message reply */
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};
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/* IPC queue */
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struct mss_pm_ipc_queue {
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unsigned int state;
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struct mss_pm_ipc_msg msg;
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};
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/* IPC channel */
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struct mss_pm_ipc_ch {
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struct mss_pm_ipc_queue *tx_queue;
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struct mss_pm_ipc_queue *rx_queue;
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};
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/*****************************************************************************
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* mv_pm_ipc_init
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*
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* DESCRIPTION: Initialize PM IPC infrastructure
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*****************************************************************************
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*/
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int mv_pm_ipc_init(unsigned long ipc_control_addr);
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/*****************************************************************************
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* mv_pm_ipc_msg_rx
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*
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* DESCRIPTION: Retrieve message from IPC channel
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*****************************************************************************
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*/
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int mv_pm_ipc_msg_rx(unsigned int channel_id, struct mss_pm_ipc_msg *msg);
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/*****************************************************************************
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* mv_pm_ipc_msg_tx
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*
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* DESCRIPTION: Send message via IPC channel
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*****************************************************************************
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*/
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int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id,
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unsigned int cluster_power_state);
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#endif /* MSS_IPC_DRV_H */
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