111 lines
3.5 KiB
ArmAsm
111 lines
3.5 KiB
ArmAsm
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <drivers/console.h>
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#include <platform_def.h>
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.weak plat_my_core_pos
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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.weak platform_mem_init
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.globl plat_ls_calc_core_pos
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/* -----------------------------------------------------
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* unsigned int plat_my_core_pos(void)
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* This function uses the plat_ls_calc_core_pos()
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* definition to get the index of the calling CPU.
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* -----------------------------------------------------
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*/
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func plat_my_core_pos
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mrs x0, mpidr_el1
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b plat_ls_calc_core_pos
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endfunc plat_my_core_pos
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/* -----------------------------------------------------
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* unsigned int plat_ls_calc_core_pos(u_register_t mpidr)
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* Helper function to calculate the core position.
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* With this function: CorePos = (ClusterId * 4) +
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* CoreId
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* -----------------------------------------------------
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*/
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func plat_ls_calc_core_pos
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and x1, x0, #MPIDR_CPU_MASK
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and x0, x0, #MPIDR_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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endfunc plat_ls_calc_core_pos
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/* ---------------------------------------------
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* int plat_crash_console_init(void)
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* Function to initialize the crash console
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* without a C Runtime to print crash report.
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* Clobber list : x0 - x4
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* ---------------------------------------------
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*/
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/* -----------------------------------------------------
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* int plat_crash_console_init(void)
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* Use normal console by default. Switch it to crash
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* mode so serial consoles become active again.
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* NOTE: This default implementation will only work for
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* crashes that occur after a normal console (marked
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* valid for the crash state) has been registered with
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* the console framework. To debug crashes that occur
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* earlier, the platform has to override these functions
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* with an implementation that initializes a console
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* driver with hardcoded parameters. See
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* docs/porting-guide.rst for more information.
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* -----------------------------------------------------
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*/
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func plat_crash_console_init
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#if defined(IMAGE_BL1)
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/*
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* BL1 code can possibly crash so early that the data segment is not yet
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* accessible. Don't risk undefined behavior by trying to run the normal
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* console framework. Platforms that want to debug BL1 will need to
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* override this with custom functions that can run from registers only.
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*/
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mov x0, #0
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ret
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#else /* IMAGE_BL1 */
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mov x3, x30
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mov x0, #CONSOLE_FLAG_CRASH
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bl console_switch_state
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mov x0, #1
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ret x3
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#endif
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endfunc plat_crash_console_init
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/* -----------------------------------------------------
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* void plat_crash_console_putc(int character)
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* Output through the normal console by default.
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* -----------------------------------------------------
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*/
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func plat_crash_console_putc
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b console_putc
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endfunc plat_crash_console_putc
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/* -----------------------------------------------------
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* void plat_crash_console_flush(void)
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* Flush normal console by default.
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* -----------------------------------------------------
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*/
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func plat_crash_console_flush
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b console_flush
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endfunc plat_crash_console_flush
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/* ---------------------------------------------------------------------
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* We don't need to carry out any memory initialization on LS
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* platforms. The Secure SRAM is accessible straight away.
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* ---------------------------------------------------------------------
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*/
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func platform_mem_init
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ret
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endfunc platform_mem_init
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