563 lines
14 KiB
C
563 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/**
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* drd.c - DesignWare USB3 DRD Controller Dual-role support
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*
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* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com
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*
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* Authors: Roger Quadros <rogerq@ti.com>
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*/
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#include <linux/extcon.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#include <linux/property.h>
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#include "debug.h"
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#include "core.h"
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#include "gadget.h"
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static void dwc3_otg_disable_events(struct dwc3 *dwc, u32 disable_mask)
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{
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u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN);
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reg &= ~(disable_mask);
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dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
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}
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static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask)
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{
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u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN);
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reg |= (enable_mask);
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dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
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}
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static void dwc3_otg_clear_events(struct dwc3 *dwc)
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{
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u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT);
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dwc3_writel(dwc->regs, DWC3_OEVTEN, reg);
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}
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#define DWC3_OTG_ALL_EVENTS (DWC3_OEVTEN_XHCIRUNSTPSETEN | \
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DWC3_OEVTEN_DEVRUNSTPSETEN | DWC3_OEVTEN_HIBENTRYEN | \
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DWC3_OEVTEN_CONIDSTSCHNGEN | DWC3_OEVTEN_HRRCONFNOTIFEN | \
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DWC3_OEVTEN_HRRINITNOTIFEN | DWC3_OEVTEN_ADEVIDLEEN | \
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DWC3_OEVTEN_ADEVBHOSTENDEN | DWC3_OEVTEN_ADEVHOSTEN | \
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DWC3_OEVTEN_ADEVHNPCHNGEN | DWC3_OEVTEN_ADEVSRPDETEN | \
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DWC3_OEVTEN_ADEVSESSENDDETEN | DWC3_OEVTEN_BDEVBHOSTENDEN | \
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DWC3_OEVTEN_BDEVHNPCHNGEN | DWC3_OEVTEN_BDEVSESSVLDDETEN | \
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DWC3_OEVTEN_BDEVVBUSCHNGEN)
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static irqreturn_t dwc3_otg_thread_irq(int irq, void *_dwc)
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{
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struct dwc3 *dwc = _dwc;
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spin_lock(&dwc->lock);
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if (dwc->otg_restart_host) {
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dwc3_otg_host_init(dwc);
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dwc->otg_restart_host = 0;
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}
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spin_unlock(&dwc->lock);
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dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
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return IRQ_HANDLED;
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}
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static irqreturn_t dwc3_otg_irq(int irq, void *_dwc)
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{
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u32 reg;
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struct dwc3 *dwc = _dwc;
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irqreturn_t ret = IRQ_NONE;
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reg = dwc3_readl(dwc->regs, DWC3_OEVT);
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if (reg) {
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/* ignore non OTG events, we can't disable them in OEVTEN */
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if (!(reg & DWC3_OTG_ALL_EVENTS)) {
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dwc3_writel(dwc->regs, DWC3_OEVT, reg);
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return IRQ_NONE;
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}
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if (dwc->current_otg_role == DWC3_OTG_ROLE_HOST &&
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!(reg & DWC3_OEVT_DEVICEMODE))
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dwc->otg_restart_host = 1;
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dwc3_writel(dwc->regs, DWC3_OEVT, reg);
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ret = IRQ_WAKE_THREAD;
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}
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return ret;
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}
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static void dwc3_otgregs_init(struct dwc3 *dwc)
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{
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u32 reg;
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/*
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* Prevent host/device reset from resetting OTG core.
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* If we don't do this then xhci_reset (USBCMD.HCRST) will reset
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* the signal outputs sent to the PHY, the OTG FSM logic of the
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* core and also the resets to the VBUS filters inside the core.
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCFG);
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reg |= DWC3_OCFG_SFTRSTMASK;
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dwc3_writel(dwc->regs, DWC3_OCFG, reg);
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/* Disable hibernation for simplicity */
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reg = dwc3_readl(dwc->regs, DWC3_GCTL);
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reg &= ~DWC3_GCTL_GBLHIBERNATIONEN;
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dwc3_writel(dwc->regs, DWC3_GCTL, reg);
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/*
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* Initialize OTG registers as per
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* Figure 11-4 OTG Driver Overall Programming Flow
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*/
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/* OCFG.SRPCap = 0, OCFG.HNPCap = 0 */
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reg = dwc3_readl(dwc->regs, DWC3_OCFG);
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reg &= ~(DWC3_OCFG_SRPCAP | DWC3_OCFG_HNPCAP);
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dwc3_writel(dwc->regs, DWC3_OCFG, reg);
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/* OEVT = FFFF */
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dwc3_otg_clear_events(dwc);
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/* OEVTEN = 0 */
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dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
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/* OEVTEN.ConIDStsChngEn = 1. Instead we enable all events */
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dwc3_otg_enable_events(dwc, DWC3_OTG_ALL_EVENTS);
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/*
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* OCTL.PeriMode = 1, OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0,
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* OCTL.HNPReq = 0
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg |= DWC3_OCTL_PERIMODE;
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reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN |
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DWC3_OCTL_HNPREQ);
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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}
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static int dwc3_otg_get_irq(struct dwc3 *dwc)
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{
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struct platform_device *dwc3_pdev = to_platform_device(dwc->dev);
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int irq;
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irq = platform_get_irq_byname_optional(dwc3_pdev, "otg");
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if (irq > 0)
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goto out;
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if (irq == -EPROBE_DEFER)
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goto out;
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irq = platform_get_irq_byname_optional(dwc3_pdev, "dwc_usb3");
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if (irq > 0)
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goto out;
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if (irq == -EPROBE_DEFER)
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goto out;
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irq = platform_get_irq(dwc3_pdev, 0);
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if (irq > 0)
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goto out;
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if (!irq)
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irq = -EINVAL;
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out:
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return irq;
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}
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void dwc3_otg_init(struct dwc3 *dwc)
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{
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u32 reg;
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/*
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* As per Figure 11-4 OTG Driver Overall Programming Flow,
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* block "Initialize GCTL for OTG operation".
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*/
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/* GCTL.PrtCapDir=2'b11 */
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dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG);
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/* GUSB2PHYCFG0.SusPHY=0 */
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reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
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dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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/* Initialize OTG registers */
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dwc3_otgregs_init(dwc);
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}
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void dwc3_otg_exit(struct dwc3 *dwc)
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{
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/* disable all OTG IRQs */
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dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
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/* clear all events */
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dwc3_otg_clear_events(dwc);
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}
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/* should be called before Host controller driver is started */
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void dwc3_otg_host_init(struct dwc3 *dwc)
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{
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u32 reg;
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/* As per Figure 11-10 A-Device Flow Diagram */
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/* OCFG.HNPCap = 0, OCFG.SRPCap = 0. Already 0 */
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/*
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* OCTL.PeriMode=0, OCTL.TermSelDLPulse = 0,
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* OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg &= ~(DWC3_OCTL_PERIMODE | DWC3_OCTL_TERMSELIDPULSE |
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DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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/*
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* OCFG.DisPrtPwrCutoff = 0/1
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCFG);
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reg &= ~DWC3_OCFG_DISPWRCUTTOFF;
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dwc3_writel(dwc->regs, DWC3_OCFG, reg);
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/*
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* OCFG.SRPCap = 1, OCFG.HNPCap = GHWPARAMS6.HNP_CAP
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* We don't want SRP/HNP for simple dual-role so leave
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* these disabled.
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*/
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/*
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* OEVTEN.OTGADevHostEvntEn = 1
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* OEVTEN.OTGADevSessEndDetEvntEn = 1
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* We don't want HNP/role-swap so leave these disabled.
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*/
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/* GUSB2PHYCFG.ULPIAutoRes = 1/0, GUSB2PHYCFG.SusPHY = 1 */
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if (!dwc->dis_u2_susphy_quirk) {
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reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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reg |= DWC3_GUSB2PHYCFG_SUSPHY;
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dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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}
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/* Set Port Power to enable VBUS: OCTL.PrtPwrCtl = 1 */
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg |= DWC3_OCTL_PRTPWRCTL;
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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}
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/* should be called after Host controller driver is stopped */
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static void dwc3_otg_host_exit(struct dwc3 *dwc)
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{
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u32 reg;
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/*
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* Exit from A-device flow as per
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* Figure 11-4 OTG Driver Overall Programming Flow
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*/
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/*
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* OEVTEN.OTGADevBHostEndEvntEn=0, OEVTEN.OTGADevHNPChngEvntEn=0
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* OEVTEN.OTGADevSessEndDetEvntEn=0,
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* OEVTEN.OTGADevHostEvntEn = 0
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* But we don't disable any OTG events
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*/
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/* OCTL.HstSetHNPEn = 0, OCTL.PrtPwrCtl=0 */
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg &= ~(DWC3_OCTL_HSTSETHNPEN | DWC3_OCTL_PRTPWRCTL);
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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}
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/* should be called before the gadget controller driver is started */
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static void dwc3_otg_device_init(struct dwc3 *dwc)
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{
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u32 reg;
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/* As per Figure 11-20 B-Device Flow Diagram */
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/*
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* OCFG.HNPCap = GHWPARAMS6.HNP_CAP, OCFG.SRPCap = 1
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* but we keep them 0 for simple dual-role operation.
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCFG);
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/* OCFG.OTGSftRstMsk = 0/1 */
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reg |= DWC3_OCFG_SFTRSTMASK;
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dwc3_writel(dwc->regs, DWC3_OCFG, reg);
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/*
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* OCTL.PeriMode = 1
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* OCTL.TermSelDLPulse = 0/1, OCTL.HNPReq = 0
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* OCTL.DevSetHNPEn = 0, OCTL.HstSetHNPEn = 0
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*/
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg |= DWC3_OCTL_PERIMODE;
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reg &= ~(DWC3_OCTL_TERMSELIDPULSE | DWC3_OCTL_HNPREQ |
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DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HSTSETHNPEN);
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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/* OEVTEN.OTGBDevSesVldDetEvntEn = 1 */
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dwc3_otg_enable_events(dwc, DWC3_OEVTEN_BDEVSESSVLDDETEN);
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/* GUSB2PHYCFG.ULPIAutoRes = 0, GUSB2PHYCFG0.SusPHY = 1 */
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if (!dwc->dis_u2_susphy_quirk) {
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reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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reg |= DWC3_GUSB2PHYCFG_SUSPHY;
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dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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}
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/* GCTL.GblHibernationEn = 0. Already 0. */
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}
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/* should be called after the gadget controller driver is stopped */
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static void dwc3_otg_device_exit(struct dwc3 *dwc)
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{
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u32 reg;
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/*
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* Exit from B-device flow as per
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* Figure 11-4 OTG Driver Overall Programming Flow
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*/
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/*
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* OEVTEN.OTGBDevHNPChngEvntEn = 0
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* OEVTEN.OTGBDevVBusChngEvntEn = 0
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* OEVTEN.OTGBDevBHostEndEvntEn = 0
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*/
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dwc3_otg_disable_events(dwc, DWC3_OEVTEN_BDEVHNPCHNGEN |
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DWC3_OEVTEN_BDEVVBUSCHNGEN |
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DWC3_OEVTEN_BDEVBHOSTENDEN);
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/* OCTL.DevSetHNPEn = 0, OCTL.HNPReq = 0, OCTL.PeriMode=1 */
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reg = dwc3_readl(dwc->regs, DWC3_OCTL);
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reg &= ~(DWC3_OCTL_DEVSETHNPEN | DWC3_OCTL_HNPREQ);
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reg |= DWC3_OCTL_PERIMODE;
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dwc3_writel(dwc->regs, DWC3_OCTL, reg);
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}
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void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus)
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{
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int ret;
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u32 reg;
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int id;
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unsigned long flags;
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if (dwc->dr_mode != USB_DR_MODE_OTG)
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return;
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/* don't do anything if debug user changed role to not OTG */
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if (dwc->current_dr_role != DWC3_GCTL_PRTCAP_OTG)
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return;
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if (!ignore_idstatus) {
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reg = dwc3_readl(dwc->regs, DWC3_OSTS);
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id = !!(reg & DWC3_OSTS_CONIDSTS);
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dwc->desired_otg_role = id ? DWC3_OTG_ROLE_DEVICE :
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DWC3_OTG_ROLE_HOST;
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}
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if (dwc->desired_otg_role == dwc->current_otg_role)
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return;
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switch (dwc->current_otg_role) {
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case DWC3_OTG_ROLE_HOST:
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dwc3_host_exit(dwc);
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spin_lock_irqsave(&dwc->lock, flags);
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dwc3_otg_host_exit(dwc);
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spin_unlock_irqrestore(&dwc->lock, flags);
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break;
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case DWC3_OTG_ROLE_DEVICE:
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dwc3_gadget_exit(dwc);
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spin_lock_irqsave(&dwc->lock, flags);
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dwc3_event_buffers_cleanup(dwc);
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dwc3_otg_device_exit(dwc);
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spin_unlock_irqrestore(&dwc->lock, flags);
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break;
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default:
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break;
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}
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spin_lock_irqsave(&dwc->lock, flags);
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dwc->current_otg_role = dwc->desired_otg_role;
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spin_unlock_irqrestore(&dwc->lock, flags);
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switch (dwc->desired_otg_role) {
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case DWC3_OTG_ROLE_HOST:
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spin_lock_irqsave(&dwc->lock, flags);
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dwc3_otgregs_init(dwc);
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dwc3_otg_host_init(dwc);
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spin_unlock_irqrestore(&dwc->lock, flags);
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ret = dwc3_host_init(dwc);
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if (ret) {
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dev_err(dwc->dev, "failed to initialize host\n");
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} else {
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if (dwc->usb2_phy)
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otg_set_vbus(dwc->usb2_phy->otg, true);
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if (dwc->usb2_generic_phy)
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phy_set_mode(dwc->usb2_generic_phy,
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PHY_MODE_USB_HOST);
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}
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break;
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case DWC3_OTG_ROLE_DEVICE:
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spin_lock_irqsave(&dwc->lock, flags);
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dwc3_otgregs_init(dwc);
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dwc3_otg_device_init(dwc);
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dwc3_event_buffers_setup(dwc);
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spin_unlock_irqrestore(&dwc->lock, flags);
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if (dwc->usb2_phy)
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otg_set_vbus(dwc->usb2_phy->otg, false);
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if (dwc->usb2_generic_phy)
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phy_set_mode(dwc->usb2_generic_phy,
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PHY_MODE_USB_DEVICE);
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ret = dwc3_gadget_init(dwc);
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if (ret)
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dev_err(dwc->dev, "failed to initialize peripheral\n");
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break;
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default:
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break;
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}
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}
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static void dwc3_drd_update(struct dwc3 *dwc)
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{
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int id;
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if (dwc->edev) {
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id = extcon_get_state(dwc->edev, EXTCON_USB_HOST);
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if (id < 0)
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id = 0;
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dwc3_set_mode(dwc, id ?
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DWC3_GCTL_PRTCAP_HOST :
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DWC3_GCTL_PRTCAP_DEVICE);
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}
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}
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static int dwc3_drd_notifier(struct notifier_block *nb,
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unsigned long event, void *ptr)
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{
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struct dwc3 *dwc = container_of(nb, struct dwc3, edev_nb);
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dwc3_set_mode(dwc, event ?
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DWC3_GCTL_PRTCAP_HOST :
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DWC3_GCTL_PRTCAP_DEVICE);
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return NOTIFY_DONE;
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}
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static struct extcon_dev *dwc3_get_extcon(struct dwc3 *dwc)
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{
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struct device *dev = dwc->dev;
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struct device_node *np_phy, *np_conn;
|
|
struct extcon_dev *edev;
|
|
const char *name;
|
|
|
|
if (device_property_read_bool(dev, "extcon"))
|
|
return extcon_get_edev_by_phandle(dev, 0);
|
|
|
|
/*
|
|
* Device tree platforms should get extcon via phandle.
|
|
* On ACPI platforms, we get the name from a device property.
|
|
* This device property is for kernel internal use only and
|
|
* is expected to be set by the glue code.
|
|
*/
|
|
if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) {
|
|
edev = extcon_get_extcon_dev(name);
|
|
if (!edev)
|
|
return ERR_PTR(-EPROBE_DEFER);
|
|
|
|
return edev;
|
|
}
|
|
|
|
np_phy = of_parse_phandle(dev->of_node, "phys", 0);
|
|
np_conn = of_graph_get_remote_node(np_phy, -1, -1);
|
|
|
|
if (np_conn)
|
|
edev = extcon_find_edev_by_node(np_conn);
|
|
else
|
|
edev = NULL;
|
|
|
|
of_node_put(np_conn);
|
|
of_node_put(np_phy);
|
|
|
|
return edev;
|
|
}
|
|
|
|
int dwc3_drd_init(struct dwc3 *dwc)
|
|
{
|
|
int ret, irq;
|
|
|
|
dwc->edev = dwc3_get_extcon(dwc);
|
|
if (IS_ERR(dwc->edev))
|
|
return PTR_ERR(dwc->edev);
|
|
|
|
if (dwc->edev) {
|
|
dwc->edev_nb.notifier_call = dwc3_drd_notifier;
|
|
ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST,
|
|
&dwc->edev_nb);
|
|
if (ret < 0) {
|
|
dev_err(dwc->dev, "couldn't register cable notifier\n");
|
|
return ret;
|
|
}
|
|
|
|
dwc3_drd_update(dwc);
|
|
} else {
|
|
dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG);
|
|
dwc->current_dr_role = DWC3_GCTL_PRTCAP_OTG;
|
|
|
|
/* use OTG block to get ID event */
|
|
irq = dwc3_otg_get_irq(dwc);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
dwc->otg_irq = irq;
|
|
|
|
/* disable all OTG IRQs */
|
|
dwc3_otg_disable_events(dwc, DWC3_OTG_ALL_EVENTS);
|
|
/* clear all events */
|
|
dwc3_otg_clear_events(dwc);
|
|
|
|
ret = request_threaded_irq(dwc->otg_irq, dwc3_otg_irq,
|
|
dwc3_otg_thread_irq,
|
|
IRQF_SHARED, "dwc3-otg", dwc);
|
|
if (ret) {
|
|
dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
|
|
dwc->otg_irq, ret);
|
|
ret = -ENODEV;
|
|
return ret;
|
|
}
|
|
|
|
dwc3_otg_init(dwc);
|
|
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void dwc3_drd_exit(struct dwc3 *dwc)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (dwc->edev)
|
|
extcon_unregister_notifier(dwc->edev, EXTCON_USB_HOST,
|
|
&dwc->edev_nb);
|
|
|
|
cancel_work_sync(&dwc->drd_work);
|
|
|
|
/* debug user might have changed role, clean based on current role */
|
|
switch (dwc->current_dr_role) {
|
|
case DWC3_GCTL_PRTCAP_HOST:
|
|
dwc3_host_exit(dwc);
|
|
break;
|
|
case DWC3_GCTL_PRTCAP_DEVICE:
|
|
dwc3_gadget_exit(dwc);
|
|
dwc3_event_buffers_cleanup(dwc);
|
|
break;
|
|
case DWC3_GCTL_PRTCAP_OTG:
|
|
dwc3_otg_exit(dwc);
|
|
spin_lock_irqsave(&dwc->lock, flags);
|
|
dwc->desired_otg_role = DWC3_OTG_ROLE_IDLE;
|
|
spin_unlock_irqrestore(&dwc->lock, flags);
|
|
dwc3_otg_update(dwc, 1);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (!dwc->edev)
|
|
free_irq(dwc->otg_irq, dwc);
|
|
}
|