556 lines
15 KiB
C
556 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PCI <-> OF mapping helpers
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*
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* Copyright 2011 IBM Corp.
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*/
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#define pr_fmt(fmt) "PCI: OF: " fmt
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_pci.h>
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#include "pci.h"
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#ifdef CONFIG_PCI
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void pci_set_of_node(struct pci_dev *dev)
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{
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if (!dev->bus->dev.of_node)
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return;
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dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node,
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dev->devfn);
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if (dev->dev.of_node)
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dev->dev.fwnode = &dev->dev.of_node->fwnode;
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}
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void pci_release_of_node(struct pci_dev *dev)
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{
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of_node_put(dev->dev.of_node);
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dev->dev.of_node = NULL;
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dev->dev.fwnode = NULL;
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}
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void pci_set_bus_of_node(struct pci_bus *bus)
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{
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struct device_node *node;
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if (bus->self == NULL) {
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node = pcibios_get_phb_of_node(bus);
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} else {
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node = of_node_get(bus->self->dev.of_node);
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if (node && of_property_read_bool(node, "external-facing"))
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bus->self->untrusted = true;
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}
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bus->dev.of_node = node;
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if (bus->dev.of_node)
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bus->dev.fwnode = &bus->dev.of_node->fwnode;
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}
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void pci_release_bus_of_node(struct pci_bus *bus)
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{
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of_node_put(bus->dev.of_node);
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bus->dev.of_node = NULL;
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bus->dev.fwnode = NULL;
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}
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struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
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{
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/* This should only be called for PHBs */
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if (WARN_ON(bus->self || bus->parent))
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return NULL;
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/*
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* Look for a node pointer in either the intermediary device we
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* create above the root bus or its own parent. Normally only
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* the later is populated.
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*/
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if (bus->bridge->of_node)
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return of_node_get(bus->bridge->of_node);
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if (bus->bridge->parent && bus->bridge->parent->of_node)
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return of_node_get(bus->bridge->parent->of_node);
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return NULL;
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}
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struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
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{
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#ifdef CONFIG_IRQ_DOMAIN
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struct irq_domain *d;
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if (!bus->dev.of_node)
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return NULL;
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/* Start looking for a phandle to an MSI controller. */
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d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
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if (d)
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return d;
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/*
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* If we don't have an msi-parent property, look for a domain
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* directly attached to the host bridge.
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*/
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d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
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if (d)
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return d;
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return irq_find_host(bus->dev.of_node);
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#else
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return NULL;
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#endif
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}
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static inline int __of_pci_pci_compare(struct device_node *node,
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unsigned int data)
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{
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int devfn;
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devfn = of_pci_get_devfn(node);
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if (devfn < 0)
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return 0;
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return devfn == data;
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}
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struct device_node *of_pci_find_child_device(struct device_node *parent,
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unsigned int devfn)
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{
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struct device_node *node, *node2;
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for_each_child_of_node(parent, node) {
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if (__of_pci_pci_compare(node, devfn))
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return node;
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/*
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* Some OFs create a parent node "multifunc-device" as
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* a fake root for all functions of a multi-function
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* device we go down them as well.
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*/
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if (of_node_name_eq(node, "multifunc-device")) {
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for_each_child_of_node(node, node2) {
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if (__of_pci_pci_compare(node2, devfn)) {
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of_node_put(node);
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return node2;
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}
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}
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(of_pci_find_child_device);
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/**
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* of_pci_get_devfn() - Get device and function numbers for a device node
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* @np: device node
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*
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* Parses a standard 5-cell PCI resource and returns an 8-bit value that can
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* be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
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* and function numbers respectively. On error a negative error code is
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* returned.
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*/
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int of_pci_get_devfn(struct device_node *np)
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{
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u32 reg[5];
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int error;
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error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
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if (error)
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return error;
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return (reg[0] >> 8) & 0xff;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_devfn);
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/**
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* of_pci_parse_bus_range() - parse the bus-range property of a PCI device
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* @node: device node
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* @res: address to a struct resource to return the bus-range
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*
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* Returns 0 on success or a negative error-code on failure.
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*/
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int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
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{
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u32 bus_range[2];
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int error;
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error = of_property_read_u32_array(node, "bus-range", bus_range,
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ARRAY_SIZE(bus_range));
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if (error)
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return error;
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res->name = node->name;
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res->start = bus_range[0];
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res->end = bus_range[1];
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res->flags = IORESOURCE_BUS;
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
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/**
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* This function will try to obtain the host bridge domain number by
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* finding a property called "linux,pci-domain" of the given device node.
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*
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* @node: device tree node with the domain information
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*
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* Returns the associated domain number from DT in the range [0-0xffff], or
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* a negative value if the required property is not found.
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*/
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int of_get_pci_domain_nr(struct device_node *node)
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{
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u32 domain;
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int error;
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error = of_property_read_u32(node, "linux,pci-domain", &domain);
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if (error)
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return error;
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return (u16)domain;
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}
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EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
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/**
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* of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
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* is present and valid
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*/
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void of_pci_check_probe_only(void)
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{
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u32 val;
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int ret;
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ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
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if (ret) {
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if (ret == -ENODATA || ret == -EOVERFLOW)
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pr_warn("linux,pci-probe-only without valid value, ignoring\n");
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return;
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}
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if (val)
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pci_add_flags(PCI_PROBE_ONLY);
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else
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pci_clear_flags(PCI_PROBE_ONLY);
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pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis");
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}
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EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
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#if defined(CONFIG_OF_ADDRESS)
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/**
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* devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
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* host bridge resources from DT
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* @dev: host bridge device
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* @busno: bus number associated with the bridge root bus
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* @bus_max: maximum number of buses for this bridge
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* @resources: list where the range of resources will be added after DT parsing
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* @io_base: pointer to a variable that will contain on return the physical
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* address for the start of the I/O range. Can be NULL if the caller doesn't
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* expect I/O ranges to be present in the device tree.
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*
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* This function will parse the "ranges" property of a PCI host bridge device
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* node and setup the resource mapping based on its content. It is expected
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* that the property conforms with the Power ePAPR document.
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*
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* It returns zero if the range parsing has been successful or a standard error
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* value if it failed.
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*/
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int devm_of_pci_get_host_bridge_resources(struct device *dev,
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unsigned char busno, unsigned char bus_max,
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struct list_head *resources, resource_size_t *io_base)
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{
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struct device_node *dev_node = dev->of_node;
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struct resource *res, tmp_res;
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struct resource *bus_range;
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struct of_pci_range range;
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struct of_pci_range_parser parser;
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char range_type[4];
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int err;
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if (io_base)
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*io_base = (resource_size_t)OF_BAD_ADDR;
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bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
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if (!bus_range)
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return -ENOMEM;
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dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
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err = of_pci_parse_bus_range(dev_node, bus_range);
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if (err) {
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bus_range->start = busno;
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bus_range->end = bus_max;
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bus_range->flags = IORESOURCE_BUS;
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dev_info(dev, " No bus range found for %pOF, using %pR\n",
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dev_node, bus_range);
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} else {
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if (bus_range->end > bus_range->start + bus_max)
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bus_range->end = bus_range->start + bus_max;
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}
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pci_add_resource(resources, bus_range);
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/* Check for ranges property */
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err = of_pci_range_parser_init(&parser, dev_node);
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if (err)
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goto failed;
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dev_dbg(dev, "Parsing ranges property...\n");
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for_each_of_pci_range(&parser, &range) {
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/* Read next ranges element */
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if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
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snprintf(range_type, 4, " IO");
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else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
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snprintf(range_type, 4, "MEM");
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else
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snprintf(range_type, 4, "err");
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dev_info(dev, " %s %#010llx..%#010llx -> %#010llx\n",
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range_type, range.cpu_addr,
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range.cpu_addr + range.size - 1, range.pci_addr);
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/*
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* If we failed translation or got a zero-sized region
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* then skip this range
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*/
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if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
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continue;
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err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
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if (err)
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continue;
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res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
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if (!res) {
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err = -ENOMEM;
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goto failed;
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}
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if (resource_type(res) == IORESOURCE_IO) {
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if (!io_base) {
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dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
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dev_node);
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err = -EINVAL;
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goto failed;
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}
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if (*io_base != (resource_size_t)OF_BAD_ADDR)
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dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
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dev_node);
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*io_base = range.cpu_addr;
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}
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pci_add_resource_offset(resources, res, res->start - range.pci_addr);
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}
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return 0;
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failed:
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pci_free_resource_list(resources);
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return err;
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}
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EXPORT_SYMBOL_GPL(devm_of_pci_get_host_bridge_resources);
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#endif /* CONFIG_OF_ADDRESS */
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#if IS_ENABLED(CONFIG_OF_IRQ)
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/**
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* of_irq_parse_pci - Resolve the interrupt for a PCI device
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* @pdev: the device whose interrupt is to be resolved
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* @out_irq: structure of_phandle_args filled by this function
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*
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* This function resolves the PCI interrupt for a given PCI device. If a
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* device-node exists for a given pci_dev, it will use normal OF tree
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* walking. If not, it will implement standard swizzling and walk up the
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* PCI tree until an device-node is found, at which point it will finish
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* resolving using the OF tree walking.
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*/
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static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
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{
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struct device_node *dn, *ppnode;
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struct pci_dev *ppdev;
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__be32 laddr[3];
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u8 pin;
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int rc;
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/*
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* Check if we have a device node, if yes, fallback to standard
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* device tree parsing
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*/
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dn = pci_device_to_OF_node(pdev);
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if (dn) {
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rc = of_irq_parse_one(dn, 0, out_irq);
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if (!rc)
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return rc;
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}
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/*
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* Ok, we don't, time to have fun. Let's start by building up an
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* interrupt spec. we assume #interrupt-cells is 1, which is standard
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* for PCI. If you do different, then don't use that routine.
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*/
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rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
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if (rc != 0)
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goto err;
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/* No pin, exit with no error message. */
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if (pin == 0)
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return -ENODEV;
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/* Now we walk up the PCI tree */
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for (;;) {
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/* Get the pci_dev of our parent */
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ppdev = pdev->bus->self;
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/* Ouch, it's a host bridge... */
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if (ppdev == NULL) {
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ppnode = pci_bus_to_OF_node(pdev->bus);
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/* No node for host bridge ? give up */
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if (ppnode == NULL) {
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rc = -EINVAL;
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goto err;
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}
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} else {
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/* We found a P2P bridge, check if it has a node */
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ppnode = pci_device_to_OF_node(ppdev);
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}
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/*
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* Ok, we have found a parent with a device-node, hand over to
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* the OF parsing code.
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* We build a unit address from the linux device to be used for
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* resolution. Note that we use the linux bus number which may
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* not match your firmware bus numbering.
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* Fortunately, in most cases, interrupt-map-mask doesn't
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* include the bus number as part of the matching.
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* You should still be careful about that though if you intend
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* to rely on this function (you ship a firmware that doesn't
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* create device nodes for all PCI devices).
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*/
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if (ppnode)
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break;
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/*
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* We can only get here if we hit a P2P bridge with no node;
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* let's do standard swizzling and try again
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*/
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pin = pci_swizzle_interrupt_pin(pdev, pin);
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pdev = ppdev;
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}
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out_irq->np = ppnode;
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out_irq->args_count = 1;
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out_irq->args[0] = pin;
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laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
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laddr[1] = laddr[2] = cpu_to_be32(0);
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rc = of_irq_parse_raw(laddr, out_irq);
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if (rc)
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goto err;
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return 0;
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err:
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if (rc == -ENOENT) {
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dev_warn(&pdev->dev,
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"%s: no interrupt-map found, INTx interrupts not available\n",
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__func__);
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pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
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__func__);
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} else {
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dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
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}
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return rc;
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}
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/**
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* of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
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* @dev: The PCI device needing an IRQ
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* @slot: PCI slot number; passed when used as map_irq callback. Unused
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* @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
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*
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* @slot and @pin are unused, but included in the function so that this
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* function can be used directly as the map_irq callback to
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* pci_assign_irq() and struct pci_host_bridge.map_irq pointer
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*/
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int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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struct of_phandle_args oirq;
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int ret;
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ret = of_irq_parse_pci(dev, &oirq);
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if (ret)
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return 0; /* Proper return code 0 == NO_IRQ */
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return irq_create_of_mapping(&oirq);
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}
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EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
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#endif /* CONFIG_OF_IRQ */
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int pci_parse_request_of_pci_ranges(struct device *dev,
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struct list_head *resources,
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struct resource **bus_range)
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{
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int err, res_valid = 0;
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resource_size_t iobase;
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struct resource_entry *win, *tmp;
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INIT_LIST_HEAD(resources);
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err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources,
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&iobase);
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if (err)
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return err;
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err = devm_request_pci_bus_resources(dev, resources);
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if (err)
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goto out_release_res;
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resource_list_for_each_entry_safe(win, tmp, resources) {
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struct resource *res = win->res;
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switch (resource_type(res)) {
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case IORESOURCE_IO:
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err = devm_pci_remap_iospace(dev, res, iobase);
|
|
if (err) {
|
|
dev_warn(dev, "error %d: failed to map resource %pR\n",
|
|
err, res);
|
|
resource_list_destroy_entry(win);
|
|
}
|
|
break;
|
|
case IORESOURCE_MEM:
|
|
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
|
|
break;
|
|
case IORESOURCE_BUS:
|
|
if (bus_range)
|
|
*bus_range = res;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (res_valid)
|
|
return 0;
|
|
|
|
dev_err(dev, "non-prefetchable memory resource required\n");
|
|
err = -EINVAL;
|
|
|
|
out_release_res:
|
|
pci_free_resource_list(resources);
|
|
return err;
|
|
}
|
|
|
|
#endif /* CONFIG_PCI */
|
|
|
|
/**
|
|
* This function will try to find the limitation of link speed by finding
|
|
* a property called "max-link-speed" of the given device node.
|
|
*
|
|
* @node: device tree node with the max link speed information
|
|
*
|
|
* Returns the associated max link speed from DT, or a negative value if the
|
|
* required property is not found or is invalid.
|
|
*/
|
|
int of_pci_get_max_link_speed(struct device_node *node)
|
|
{
|
|
u32 max_link_speed;
|
|
|
|
if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
|
|
max_link_speed > 4)
|
|
return -EINVAL;
|
|
|
|
return max_link_speed;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
|