290 lines
6.1 KiB
C
290 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2017 Linaro Ltd.
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*/
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#include <linux/device.h>
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#include <linux/firmware.h>
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#include <linux/kernel.h>
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#include <linux/iommu.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/qcom_scm.h>
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#include <linux/sizes.h>
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#include <linux/soc/qcom/mdt_loader.h>
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#include "core.h"
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#include "firmware.h"
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#include "hfi_venus_io.h"
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#define VENUS_PAS_ID 9
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#define VENUS_FW_MEM_SIZE (6 * SZ_1M)
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#define VENUS_FW_START_ADDR 0x0
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static void venus_reset_cpu(struct venus_core *core)
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{
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u32 fw_size = core->fw.mapped_mem_size;
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void __iomem *base = core->base;
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writel(0, base + WRAPPER_FW_START_ADDR);
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writel(fw_size, base + WRAPPER_FW_END_ADDR);
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writel(0, base + WRAPPER_CPA_START_ADDR);
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writel(fw_size, base + WRAPPER_CPA_END_ADDR);
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writel(fw_size, base + WRAPPER_NONPIX_START_ADDR);
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writel(fw_size, base + WRAPPER_NONPIX_END_ADDR);
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writel(0x0, base + WRAPPER_CPU_CGC_DIS);
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writel(0x0, base + WRAPPER_CPU_CLOCK_CONFIG);
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/* Bring ARM9 out of reset */
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writel(0, base + WRAPPER_A9SS_SW_RESET);
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}
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int venus_set_hw_state(struct venus_core *core, bool resume)
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{
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if (core->use_tz)
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return qcom_scm_set_remote_state(resume, 0);
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if (resume)
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venus_reset_cpu(core);
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else
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writel(1, core->base + WRAPPER_A9SS_SW_RESET);
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return 0;
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}
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static int venus_load_fw(struct venus_core *core, const char *fwname,
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phys_addr_t *mem_phys, size_t *mem_size)
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{
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const struct firmware *mdt;
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struct device_node *node;
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struct device *dev;
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struct resource r;
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ssize_t fw_size;
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void *mem_va;
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int ret;
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*mem_phys = 0;
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*mem_size = 0;
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dev = core->dev;
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node = of_parse_phandle(dev->of_node, "memory-region", 0);
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if (!node) {
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dev_err(dev, "no memory-region specified\n");
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return -EINVAL;
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}
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ret = of_address_to_resource(node, 0, &r);
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if (ret)
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goto err_put_node;
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ret = request_firmware(&mdt, fwname, dev);
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if (ret < 0)
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goto err_put_node;
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fw_size = qcom_mdt_get_size(mdt);
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if (fw_size < 0) {
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ret = fw_size;
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goto err_release_fw;
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}
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*mem_phys = r.start;
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*mem_size = resource_size(&r);
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if (*mem_size < fw_size || fw_size > VENUS_FW_MEM_SIZE) {
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ret = -EINVAL;
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goto err_release_fw;
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}
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mem_va = memremap(r.start, *mem_size, MEMREMAP_WC);
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if (!mem_va) {
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dev_err(dev, "unable to map memory region: %pa+%zx\n",
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&r.start, *mem_size);
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ret = -ENOMEM;
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goto err_release_fw;
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}
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if (core->use_tz)
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ret = qcom_mdt_load(dev, mdt, fwname, VENUS_PAS_ID,
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mem_va, *mem_phys, *mem_size, NULL);
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else
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ret = qcom_mdt_load_no_init(dev, mdt, fwname, VENUS_PAS_ID,
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mem_va, *mem_phys, *mem_size, NULL);
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memunmap(mem_va);
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err_release_fw:
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release_firmware(mdt);
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err_put_node:
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of_node_put(node);
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return ret;
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}
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static int venus_boot_no_tz(struct venus_core *core, phys_addr_t mem_phys,
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size_t mem_size)
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{
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struct iommu_domain *iommu;
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struct device *dev;
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int ret;
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dev = core->fw.dev;
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if (!dev)
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return -EPROBE_DEFER;
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iommu = core->fw.iommu_domain;
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core->fw.mapped_mem_size = mem_size;
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ret = iommu_map(iommu, VENUS_FW_START_ADDR, mem_phys, mem_size,
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IOMMU_READ | IOMMU_WRITE | IOMMU_PRIV);
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if (ret) {
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dev_err(dev, "could not map video firmware region\n");
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return ret;
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}
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venus_reset_cpu(core);
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return 0;
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}
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static int venus_shutdown_no_tz(struct venus_core *core)
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{
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const size_t mapped = core->fw.mapped_mem_size;
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struct iommu_domain *iommu;
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size_t unmapped;
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u32 reg;
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struct device *dev = core->fw.dev;
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void __iomem *base = core->base;
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/* Assert the reset to ARM9 */
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reg = readl_relaxed(base + WRAPPER_A9SS_SW_RESET);
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reg |= WRAPPER_A9SS_SW_RESET_BIT;
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writel_relaxed(reg, base + WRAPPER_A9SS_SW_RESET);
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/* Make sure reset is asserted before the mapping is removed */
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mb();
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iommu = core->fw.iommu_domain;
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unmapped = iommu_unmap(iommu, VENUS_FW_START_ADDR, mapped);
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if (unmapped != mapped)
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dev_err(dev, "failed to unmap firmware\n");
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return 0;
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}
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int venus_boot(struct venus_core *core)
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{
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struct device *dev = core->dev;
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phys_addr_t mem_phys;
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size_t mem_size;
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int ret;
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if (!IS_ENABLED(CONFIG_QCOM_MDT_LOADER) ||
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(core->use_tz && !qcom_scm_is_available()))
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return -EPROBE_DEFER;
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ret = venus_load_fw(core, core->res->fwname, &mem_phys, &mem_size);
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if (ret) {
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dev_err(dev, "fail to load video firmware\n");
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return -EINVAL;
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}
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if (core->use_tz)
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ret = qcom_scm_pas_auth_and_reset(VENUS_PAS_ID);
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else
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ret = venus_boot_no_tz(core, mem_phys, mem_size);
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return ret;
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}
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int venus_shutdown(struct venus_core *core)
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{
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int ret;
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if (core->use_tz)
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ret = qcom_scm_pas_shutdown(VENUS_PAS_ID);
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else
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ret = venus_shutdown_no_tz(core);
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return ret;
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}
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int venus_firmware_init(struct venus_core *core)
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{
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struct platform_device_info info;
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struct iommu_domain *iommu_dom;
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struct platform_device *pdev;
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struct device_node *np;
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int ret;
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np = of_get_child_by_name(core->dev->of_node, "video-firmware");
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if (!np) {
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core->use_tz = true;
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return 0;
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}
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memset(&info, 0, sizeof(info));
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info.fwnode = &np->fwnode;
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info.parent = core->dev;
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info.name = np->name;
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info.dma_mask = DMA_BIT_MASK(32);
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pdev = platform_device_register_full(&info);
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if (IS_ERR(pdev)) {
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of_node_put(np);
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return PTR_ERR(pdev);
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}
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pdev->dev.of_node = np;
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ret = of_dma_configure(&pdev->dev, np, true);
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if (ret) {
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dev_err(core->dev, "dma configure fail\n");
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goto err_unregister;
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}
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core->fw.dev = &pdev->dev;
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iommu_dom = iommu_domain_alloc(&platform_bus_type);
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if (!iommu_dom) {
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dev_err(core->fw.dev, "Failed to allocate iommu domain\n");
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ret = -ENOMEM;
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goto err_unregister;
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}
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ret = iommu_attach_device(iommu_dom, core->fw.dev);
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if (ret) {
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dev_err(core->fw.dev, "could not attach device\n");
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goto err_iommu_free;
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}
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core->fw.iommu_domain = iommu_dom;
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of_node_put(np);
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return 0;
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err_iommu_free:
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iommu_domain_free(iommu_dom);
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err_unregister:
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platform_device_unregister(pdev);
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of_node_put(np);
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return ret;
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}
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void venus_firmware_deinit(struct venus_core *core)
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{
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struct iommu_domain *iommu;
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if (!core->fw.dev)
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return;
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iommu = core->fw.iommu_domain;
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iommu_detach_device(iommu, core->fw.dev);
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iommu_domain_free(iommu);
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platform_device_unregister(to_platform_device(core->fw.dev));
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}
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