185 lines
6.0 KiB
C
185 lines
6.0 KiB
C
/*
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* Copyright (c) 2016 Hisilicon Limited.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _HNS_ROCE_HEM_H
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#define _HNS_ROCE_HEM_H
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#define HW_SYNC_SLEEP_TIME_INTERVAL 20
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#define HW_SYNC_TIMEOUT_MSECS (25 * HW_SYNC_SLEEP_TIME_INTERVAL)
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#define BT_CMD_SYNC_SHIFT 31
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enum {
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/* MAP HEM(Hardware Entry Memory) */
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HEM_TYPE_QPC = 0,
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HEM_TYPE_MTPT,
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HEM_TYPE_CQC,
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HEM_TYPE_SRQC,
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HEM_TYPE_SCCC,
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HEM_TYPE_QPC_TIMER,
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HEM_TYPE_CQC_TIMER,
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/* UNMAP HEM */
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HEM_TYPE_MTT,
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HEM_TYPE_CQE,
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HEM_TYPE_SRQWQE,
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HEM_TYPE_IDX,
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HEM_TYPE_IRRL,
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HEM_TYPE_TRRL,
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};
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#define HNS_ROCE_HEM_CHUNK_LEN \
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((256 - sizeof(struct list_head) - 2 * sizeof(int)) / \
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(sizeof(struct scatterlist) + sizeof(void *)))
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#define check_whether_bt_num_3(type, hop_num) \
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(type < HEM_TYPE_MTT && hop_num == 2)
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#define check_whether_bt_num_2(type, hop_num) \
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((type < HEM_TYPE_MTT && hop_num == 1) || \
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(type >= HEM_TYPE_MTT && hop_num == 2))
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#define check_whether_bt_num_1(type, hop_num) \
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((type < HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0) || \
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(type >= HEM_TYPE_MTT && hop_num == 1) || \
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(type >= HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0))
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enum {
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HNS_ROCE_HEM_PAGE_SHIFT = 12,
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HNS_ROCE_HEM_PAGE_SIZE = 1 << HNS_ROCE_HEM_PAGE_SHIFT,
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};
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struct hns_roce_hem_chunk {
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struct list_head list;
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int npages;
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int nsg;
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struct scatterlist mem[HNS_ROCE_HEM_CHUNK_LEN];
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void *buf[HNS_ROCE_HEM_CHUNK_LEN];
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};
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struct hns_roce_hem {
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struct list_head chunk_list;
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int refcount;
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};
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struct hns_roce_hem_iter {
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struct hns_roce_hem *hem;
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struct hns_roce_hem_chunk *chunk;
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int page_idx;
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};
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struct hns_roce_hem_mhop {
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u32 hop_num;
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u32 buf_chunk_size;
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u32 bt_chunk_size;
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u32 ba_l0_num;
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u32 l0_idx; /* level 0 base address table index */
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u32 l1_idx; /* level 1 base address table index */
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u32 l2_idx; /* level 2 base address table index */
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};
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void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem);
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int hns_roce_table_get(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long obj);
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void hns_roce_table_put(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long obj);
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void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long obj,
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dma_addr_t *dma_handle);
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int hns_roce_table_get_range(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table,
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unsigned long start, unsigned long end);
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void hns_roce_table_put_range(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table,
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unsigned long start, unsigned long end);
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int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, u32 type,
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unsigned long obj_size, unsigned long nobj,
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int use_lowmem);
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void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table);
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void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev);
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int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_table *table, unsigned long *obj,
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struct hns_roce_hem_mhop *mhop);
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bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type);
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void hns_roce_hem_list_init(struct hns_roce_hem_list *hem_list,
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int bt_page_order);
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int hns_roce_hem_list_calc_root_ba(const struct hns_roce_buf_region *regions,
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int region_cnt, int unit);
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int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_list *hem_list,
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const struct hns_roce_buf_region *regions,
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int region_cnt);
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void hns_roce_hem_list_release(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_list *hem_list);
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void *hns_roce_hem_list_find_mtt(struct hns_roce_dev *hr_dev,
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struct hns_roce_hem_list *hem_list,
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int offset, int *mtt_cnt, u64 *phy_addr);
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static inline void hns_roce_hem_first(struct hns_roce_hem *hem,
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struct hns_roce_hem_iter *iter)
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{
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iter->hem = hem;
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iter->chunk = list_empty(&hem->chunk_list) ? NULL :
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list_entry(hem->chunk_list.next,
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struct hns_roce_hem_chunk, list);
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iter->page_idx = 0;
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}
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static inline int hns_roce_hem_last(struct hns_roce_hem_iter *iter)
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{
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return !iter->chunk;
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}
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static inline void hns_roce_hem_next(struct hns_roce_hem_iter *iter)
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{
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if (++iter->page_idx >= iter->chunk->nsg) {
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if (iter->chunk->list.next == &iter->hem->chunk_list) {
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iter->chunk = NULL;
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return;
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}
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iter->chunk = list_entry(iter->chunk->list.next,
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struct hns_roce_hem_chunk, list);
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iter->page_idx = 0;
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}
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}
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static inline dma_addr_t hns_roce_hem_addr(struct hns_roce_hem_iter *iter)
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{
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return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
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}
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#endif /*_HNS_ROCE_HEM_H*/
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