157 lines
3.5 KiB
C
157 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/at91_pmc.h>
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#include <linux/of.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pmc.h"
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#define MASTER_PRES_MASK 0x7
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#define MASTER_PRES_MAX MASTER_PRES_MASK
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#define MASTER_DIV_SHIFT 8
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#define MASTER_DIV_MASK 0x3
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#define to_clk_master(hw) container_of(hw, struct clk_master, hw)
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struct clk_master {
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struct clk_hw hw;
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struct regmap *regmap;
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const struct clk_master_layout *layout;
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const struct clk_master_characteristics *characteristics;
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u32 mckr;
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};
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static inline bool clk_master_ready(struct regmap *regmap)
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{
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unsigned int status;
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regmap_read(regmap, AT91_PMC_SR, &status);
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return status & AT91_PMC_MCKRDY ? 1 : 0;
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}
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static int clk_master_prepare(struct clk_hw *hw)
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{
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struct clk_master *master = to_clk_master(hw);
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while (!clk_master_ready(master->regmap))
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cpu_relax();
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return 0;
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}
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static int clk_master_is_prepared(struct clk_hw *hw)
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{
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struct clk_master *master = to_clk_master(hw);
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return clk_master_ready(master->regmap);
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}
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static unsigned long clk_master_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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u8 pres;
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u8 div;
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unsigned long rate = parent_rate;
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struct clk_master *master = to_clk_master(hw);
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const struct clk_master_layout *layout = master->layout;
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const struct clk_master_characteristics *characteristics =
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master->characteristics;
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unsigned int mckr;
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regmap_read(master->regmap, master->layout->offset, &mckr);
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mckr &= layout->mask;
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pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK;
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div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK;
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if (characteristics->have_div3_pres && pres == MASTER_PRES_MAX)
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rate /= 3;
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else
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rate >>= pres;
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rate /= characteristics->divisors[div];
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if (rate < characteristics->output.min)
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pr_warn("master clk is underclocked");
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else if (rate > characteristics->output.max)
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pr_warn("master clk is overclocked");
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return rate;
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}
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static u8 clk_master_get_parent(struct clk_hw *hw)
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{
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struct clk_master *master = to_clk_master(hw);
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unsigned int mckr;
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regmap_read(master->regmap, master->layout->offset, &mckr);
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return mckr & AT91_PMC_CSS;
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}
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static const struct clk_ops master_ops = {
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.prepare = clk_master_prepare,
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.is_prepared = clk_master_is_prepared,
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.recalc_rate = clk_master_recalc_rate,
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.get_parent = clk_master_get_parent,
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};
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struct clk_hw * __init
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at91_clk_register_master(struct regmap *regmap,
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const char *name, int num_parents,
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const char **parent_names,
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const struct clk_master_layout *layout,
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const struct clk_master_characteristics *characteristics)
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{
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struct clk_master *master;
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struct clk_init_data init;
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struct clk_hw *hw;
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int ret;
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if (!name || !num_parents || !parent_names)
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return ERR_PTR(-EINVAL);
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master = kzalloc(sizeof(*master), GFP_KERNEL);
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if (!master)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &master_ops;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.flags = 0;
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master->hw.init = &init;
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master->layout = layout;
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master->characteristics = characteristics;
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master->regmap = regmap;
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hw = &master->hw;
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ret = clk_hw_register(NULL, &master->hw);
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if (ret) {
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kfree(master);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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const struct clk_master_layout at91rm9200_master_layout = {
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.mask = 0x31F,
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.pres_shift = 2,
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.offset = AT91_PMC_MCKR,
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};
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const struct clk_master_layout at91sam9x5_master_layout = {
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.mask = 0x373,
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.pres_shift = 4,
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.offset = AT91_PMC_MCKR,
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};
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