662 lines
16 KiB
Plaintext
662 lines
16 KiB
Plaintext
/*
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* T2081 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2013 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&qman_fqd {
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compatible = "fsl,qman-fqd";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&qman_pfdr {
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compatible = "fsl,qman-pfdr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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interrupts = <25 2 0 0>;
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};
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/* controller at 0x240000 */
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&pci0 {
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compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <20 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <20 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 40 1 0 0
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0000 0 0 2 &mpic 1 1 0 0
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0000 0 0 3 &mpic 2 1 0 0
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0000 0 0 4 &mpic 3 1 0 0
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>;
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};
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};
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/* controller at 0x250000 */
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&pci1 {
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compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0 0xff>;
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interrupts = <21 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <21 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 41 1 0 0
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0000 0 0 2 &mpic 5 1 0 0
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0000 0 0 3 &mpic 6 1 0 0
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0000 0 0 4 &mpic 7 1 0 0
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>;
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};
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};
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/* controller at 0x260000 */
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&pci2 {
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compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <22 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <22 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 42 1 0 0
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0000 0 0 2 &mpic 9 1 0 0
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0000 0 0 3 &mpic 10 1 0 0
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0000 0 0 4 &mpic 11 1 0 0
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>;
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};
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};
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/* controller at 0x270000 */
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&pci3 {
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compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <23 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <23 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 43 1 0 0
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0000 0 0 2 &mpic 0 1 0 0
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0000 0 0 3 &mpic 4 1 0 0
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0000 0 0 4 &mpic 8 1 0 0
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>;
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};
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};
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&dcsr {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,dcsr", "simple-bus";
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dcsr-epu@0 {
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compatible = "fsl,t2080-dcsr-epu", "fsl,dcsr-epu";
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interrupts = <52 2 0 0
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84 2 0 0
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85 2 0 0
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94 2 0 0
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95 2 0 0>;
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reg = <0x0 0x1000>;
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};
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dcsr-npc {
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compatible = "fsl,t2080-dcsr-cnpc", "fsl,dcsr-cnpc";
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reg = <0x1000 0x1000 0x1002000 0x10000>;
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};
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dcsr-nxc@2000 {
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compatible = "fsl,dcsr-nxc";
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reg = <0x2000 0x1000>;
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};
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dcsr-corenet {
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compatible = "fsl,dcsr-corenet";
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reg = <0x8000 0x1000 0x1A000 0x1000>;
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};
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dcsr-ocn@11000 {
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compatible = "fsl,t2080-dcsr-ocn", "fsl,dcsr-ocn";
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reg = <0x11000 0x1000>;
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};
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dcsr-ddr@12000 {
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compatible = "fsl,dcsr-ddr";
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dev-handle = <&ddr1>;
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reg = <0x12000 0x1000>;
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};
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dcsr-nal@18000 {
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compatible = "fsl,t2080-dcsr-nal", "fsl,dcsr-nal";
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reg = <0x18000 0x1000>;
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};
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dcsr-rcpm@22000 {
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compatible = "fsl,t2080-dcsr-rcpm", "fsl,dcsr-rcpm";
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reg = <0x22000 0x1000>;
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};
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dcsr-snpc@30000 {
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compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
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reg = <0x30000 0x1000 0x1022000 0x10000>;
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};
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dcsr-snpc@31000 {
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compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
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reg = <0x31000 0x1000 0x1042000 0x10000>;
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};
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dcsr-snpc@32000 {
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compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
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reg = <0x32000 0x1000 0x1062000 0x10000>;
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};
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dcsr-cpu-sb-proxy@100000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu0>;
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reg = <0x100000 0x1000 0x101000 0x1000>;
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};
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dcsr-cpu-sb-proxy@108000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu1>;
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reg = <0x108000 0x1000 0x109000 0x1000>;
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};
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dcsr-cpu-sb-proxy@110000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu2>;
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reg = <0x110000 0x1000 0x111000 0x1000>;
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};
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dcsr-cpu-sb-proxy@118000 {
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compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu3>;
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reg = <0x118000 0x1000 0x119000 0x1000>;
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};
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};
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&bportals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "simple-bus";
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bman-portal@0 {
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compatible = "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x1000000 0x1000>;
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interrupts = <105 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x1001000 0x1000>;
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interrupts = <107 2 0 0>;
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};
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bman-portal@8000 {
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compatible = "fsl,bman-portal";
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reg = <0x8000 0x4000>, <0x1002000 0x1000>;
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interrupts = <109 2 0 0>;
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};
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bman-portal@c000 {
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compatible = "fsl,bman-portal";
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reg = <0xc000 0x4000>, <0x1003000 0x1000>;
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interrupts = <111 2 0 0>;
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};
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bman-portal@10000 {
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compatible = "fsl,bman-portal";
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reg = <0x10000 0x4000>, <0x1004000 0x1000>;
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interrupts = <113 2 0 0>;
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};
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bman-portal@14000 {
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compatible = "fsl,bman-portal";
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reg = <0x14000 0x4000>, <0x1005000 0x1000>;
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interrupts = <115 2 0 0>;
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};
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bman-portal@18000 {
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compatible = "fsl,bman-portal";
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reg = <0x18000 0x4000>, <0x1006000 0x1000>;
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interrupts = <117 2 0 0>;
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};
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bman-portal@1c000 {
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compatible = "fsl,bman-portal";
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reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
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interrupts = <119 2 0 0>;
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};
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bman-portal@20000 {
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compatible = "fsl,bman-portal";
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reg = <0x20000 0x4000>, <0x1008000 0x1000>;
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interrupts = <121 2 0 0>;
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};
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bman-portal@24000 {
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compatible = "fsl,bman-portal";
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reg = <0x24000 0x4000>, <0x1009000 0x1000>;
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interrupts = <123 2 0 0>;
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};
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bman-portal@28000 {
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compatible = "fsl,bman-portal";
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reg = <0x28000 0x4000>, <0x100a000 0x1000>;
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interrupts = <125 2 0 0>;
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};
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bman-portal@2c000 {
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compatible = "fsl,bman-portal";
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reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
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interrupts = <127 2 0 0>;
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};
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bman-portal@30000 {
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compatible = "fsl,bman-portal";
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reg = <0x30000 0x4000>, <0x100c000 0x1000>;
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interrupts = <129 2 0 0>;
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};
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bman-portal@34000 {
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compatible = "fsl,bman-portal";
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reg = <0x34000 0x4000>, <0x100d000 0x1000>;
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interrupts = <131 2 0 0>;
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};
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bman-portal@38000 {
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compatible = "fsl,bman-portal";
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reg = <0x38000 0x4000>, <0x100e000 0x1000>;
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interrupts = <133 2 0 0>;
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};
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bman-portal@3c000 {
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compatible = "fsl,bman-portal";
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reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
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interrupts = <135 2 0 0>;
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};
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bman-portal@40000 {
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compatible = "fsl,bman-portal";
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reg = <0x40000 0x4000>, <0x1010000 0x1000>;
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interrupts = <137 2 0 0>;
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};
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bman-portal@44000 {
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compatible = "fsl,bman-portal";
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reg = <0x44000 0x4000>, <0x1011000 0x1000>;
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interrupts = <139 2 0 0>;
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};
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};
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&qportals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "simple-bus";
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qportal0: qman-portal@0 {
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compatible = "fsl,qman-portal";
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reg = <0x0 0x4000>, <0x1000000 0x1000>;
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interrupts = <104 0x2 0 0>;
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cell-index = <0x0>;
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};
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qportal1: qman-portal@4000 {
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compatible = "fsl,qman-portal";
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reg = <0x4000 0x4000>, <0x1001000 0x1000>;
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interrupts = <106 0x2 0 0>;
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cell-index = <0x1>;
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};
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qportal2: qman-portal@8000 {
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compatible = "fsl,qman-portal";
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reg = <0x8000 0x4000>, <0x1002000 0x1000>;
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interrupts = <108 0x2 0 0>;
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cell-index = <0x2>;
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};
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qportal3: qman-portal@c000 {
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compatible = "fsl,qman-portal";
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reg = <0xc000 0x4000>, <0x1003000 0x1000>;
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interrupts = <110 0x2 0 0>;
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cell-index = <0x3>;
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};
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qportal4: qman-portal@10000 {
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compatible = "fsl,qman-portal";
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reg = <0x10000 0x4000>, <0x1004000 0x1000>;
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interrupts = <112 0x2 0 0>;
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cell-index = <0x4>;
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};
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qportal5: qman-portal@14000 {
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compatible = "fsl,qman-portal";
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reg = <0x14000 0x4000>, <0x1005000 0x1000>;
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interrupts = <114 0x2 0 0>;
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cell-index = <0x5>;
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};
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qportal6: qman-portal@18000 {
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compatible = "fsl,qman-portal";
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reg = <0x18000 0x4000>, <0x1006000 0x1000>;
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interrupts = <116 0x2 0 0>;
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cell-index = <0x6>;
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};
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qportal7: qman-portal@1c000 {
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compatible = "fsl,qman-portal";
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reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
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interrupts = <118 0x2 0 0>;
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cell-index = <0x7>;
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};
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qportal8: qman-portal@20000 {
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compatible = "fsl,qman-portal";
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reg = <0x20000 0x4000>, <0x1008000 0x1000>;
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interrupts = <120 0x2 0 0>;
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cell-index = <0x8>;
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};
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qportal9: qman-portal@24000 {
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compatible = "fsl,qman-portal";
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reg = <0x24000 0x4000>, <0x1009000 0x1000>;
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interrupts = <122 0x2 0 0>;
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cell-index = <0x9>;
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};
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qportal10: qman-portal@28000 {
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compatible = "fsl,qman-portal";
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reg = <0x28000 0x4000>, <0x100a000 0x1000>;
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interrupts = <124 0x2 0 0>;
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cell-index = <0xa>;
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};
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qportal11: qman-portal@2c000 {
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compatible = "fsl,qman-portal";
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reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
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interrupts = <126 0x2 0 0>;
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cell-index = <0xb>;
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};
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qportal12: qman-portal@30000 {
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compatible = "fsl,qman-portal";
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reg = <0x30000 0x4000>, <0x100c000 0x1000>;
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interrupts = <128 0x2 0 0>;
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cell-index = <0xc>;
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};
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qportal13: qman-portal@34000 {
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compatible = "fsl,qman-portal";
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reg = <0x34000 0x4000>, <0x100d000 0x1000>;
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interrupts = <130 0x2 0 0>;
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cell-index = <0xd>;
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};
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qportal14: qman-portal@38000 {
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compatible = "fsl,qman-portal";
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reg = <0x38000 0x4000>, <0x100e000 0x1000>;
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interrupts = <132 0x2 0 0>;
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cell-index = <0xe>;
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};
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qportal15: qman-portal@3c000 {
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compatible = "fsl,qman-portal";
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reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
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interrupts = <134 0x2 0 0>;
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cell-index = <0xf>;
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};
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qportal16: qman-portal@40000 {
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compatible = "fsl,qman-portal";
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reg = <0x40000 0x4000>, <0x1010000 0x1000>;
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interrupts = <136 0x2 0 0>;
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cell-index = <0x10>;
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};
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qportal17: qman-portal@44000 {
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compatible = "fsl,qman-portal";
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reg = <0x44000 0x4000>, <0x1011000 0x1000>;
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interrupts = <138 0x2 0 0>;
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cell-index = <0x11>;
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};
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};
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&soc {
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#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
device_type = "soc";
|
|
compatible = "simple-bus";
|
|
|
|
soc-sram-error {
|
|
compatible = "fsl,soc-sram-error";
|
|
interrupts = <16 2 1 29>;
|
|
};
|
|
|
|
corenet-law@0 {
|
|
compatible = "fsl,corenet-law";
|
|
reg = <0x0 0x1000>;
|
|
fsl,num-laws = <32>;
|
|
};
|
|
|
|
ddr1: memory-controller@8000 {
|
|
compatible = "fsl,qoriq-memory-controller-v4.7",
|
|
"fsl,qoriq-memory-controller";
|
|
reg = <0x8000 0x1000>;
|
|
interrupts = <16 2 1 23>;
|
|
};
|
|
|
|
cpc: l3-cache-controller@10000 {
|
|
compatible = "fsl,t2080-l3-cache-controller", "cache";
|
|
reg = <0x10000 0x1000
|
|
0x11000 0x1000
|
|
0x12000 0x1000>;
|
|
interrupts = <16 2 1 27
|
|
16 2 1 26
|
|
16 2 1 25>;
|
|
};
|
|
|
|
corenet-cf@18000 {
|
|
compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
|
|
reg = <0x18000 0x1000>;
|
|
interrupts = <16 2 1 31>;
|
|
fsl,ccf-num-csdids = <32>;
|
|
fsl,ccf-num-snoopids = <32>;
|
|
};
|
|
|
|
iommu@20000 {
|
|
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
|
reg = <0x20000 0x3000>;
|
|
fsl,portid-mapping = <0x8000>;
|
|
ranges = <0 0x20000 0x3000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupts = <
|
|
24 2 0 0
|
|
16 2 1 30>;
|
|
|
|
pamu0: pamu@0 {
|
|
reg = <0 0x1000>;
|
|
fsl,primary-cache-geometry = <32 1>;
|
|
fsl,secondary-cache-geometry = <128 2>;
|
|
};
|
|
|
|
pamu1: pamu@1000 {
|
|
reg = <0x1000 0x1000>;
|
|
fsl,primary-cache-geometry = <32 1>;
|
|
fsl,secondary-cache-geometry = <128 2>;
|
|
};
|
|
|
|
pamu2: pamu@2000 {
|
|
reg = <0x2000 0x1000>;
|
|
fsl,primary-cache-geometry = <32 1>;
|
|
fsl,secondary-cache-geometry = <128 2>;
|
|
};
|
|
};
|
|
|
|
/include/ "qoriq-mpic4.3.dtsi"
|
|
|
|
guts: global-utilities@e0000 {
|
|
compatible = "fsl,t2080-device-config", "fsl,qoriq-device-config-2.0";
|
|
reg = <0xe0000 0xe00>;
|
|
fsl,has-rstcr;
|
|
fsl,liodn-bits = <12>;
|
|
};
|
|
|
|
/include/ "qoriq-clockgen2.dtsi"
|
|
global-utilities@e1000 {
|
|
compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0";
|
|
};
|
|
|
|
rcpm: global-utilities@e2000 {
|
|
compatible = "fsl,t2080-rcpm", "fsl,qoriq-rcpm-2.0";
|
|
reg = <0xe2000 0x1000>;
|
|
};
|
|
|
|
sfp: sfp@e8000 {
|
|
compatible = "fsl,t2080-sfp";
|
|
reg = <0xe8000 0x1000>;
|
|
};
|
|
|
|
serdes: serdes@ea000 {
|
|
compatible = "fsl,t2080-serdes";
|
|
reg = <0xea000 0x4000>;
|
|
};
|
|
|
|
/include/ "elo3-dma-0.dtsi"
|
|
dma@100300 {
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
|
|
};
|
|
/include/ "elo3-dma-1.dtsi"
|
|
dma@101300 {
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
|
|
};
|
|
/include/ "elo3-dma-2.dtsi"
|
|
dma@102300 {
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x588>; /* DMA3LIODNR */
|
|
};
|
|
|
|
/include/ "qoriq-espi-0.dtsi"
|
|
spi@110000 {
|
|
fsl,espi-num-chipselects = <4>;
|
|
};
|
|
|
|
/include/ "qoriq-esdhc-0.dtsi"
|
|
sdhc@114000 {
|
|
compatible = "fsl,t2080-esdhc", "fsl,esdhc";
|
|
fsl,iommu-parent = <&pamu1>;
|
|
fsl,liodn-reg = <&guts 0x530>; /* SDMMCLIODNR */
|
|
sdhci,auto-cmd12;
|
|
};
|
|
/include/ "qoriq-i2c-0.dtsi"
|
|
/include/ "qoriq-i2c-1.dtsi"
|
|
/include/ "qoriq-duart-0.dtsi"
|
|
/include/ "qoriq-duart-1.dtsi"
|
|
/include/ "qoriq-gpio-0.dtsi"
|
|
/include/ "qoriq-gpio-1.dtsi"
|
|
/include/ "qoriq-gpio-2.dtsi"
|
|
/include/ "qoriq-gpio-3.dtsi"
|
|
/include/ "qoriq-usb2-mph-0.dtsi"
|
|
usb0: usb@210000 {
|
|
compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
|
|
fsl,iommu-parent = <&pamu1>;
|
|
fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
|
|
phy_type = "utmi";
|
|
port0;
|
|
};
|
|
/include/ "qoriq-usb2-dr-0.dtsi"
|
|
usb1: usb@211000 {
|
|
compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
|
|
fsl,iommu-parent = <&pamu1>;
|
|
fsl,liodn-reg = <&guts 0x524>; /* USB1LIODNR */
|
|
dr_mode = "host";
|
|
phy_type = "utmi";
|
|
};
|
|
/include/ "qoriq-sec5.2-0.dtsi"
|
|
/include/ "qoriq-qman3.dtsi"
|
|
/include/ "qoriq-bman1.dtsi"
|
|
|
|
/include/ "qoriq-fman3-0.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-0.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-1.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-2.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-3.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-4.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-5.dtsi"
|
|
/include/ "qoriq-fman3-0-10g-0.dtsi"
|
|
/include/ "qoriq-fman3-0-10g-1.dtsi"
|
|
fman@400000 {
|
|
enet0: ethernet@e0000 {
|
|
};
|
|
|
|
enet1: ethernet@e2000 {
|
|
};
|
|
|
|
enet2: ethernet@e4000 {
|
|
};
|
|
|
|
enet3: ethernet@e6000 {
|
|
};
|
|
|
|
enet4: ethernet@e8000 {
|
|
};
|
|
|
|
enet5: ethernet@ea000 {
|
|
};
|
|
|
|
enet6: ethernet@f0000 {
|
|
};
|
|
|
|
enet7: ethernet@f2000 {
|
|
};
|
|
|
|
mdio@fc000 {
|
|
interrupts = <100 1 0 0>;
|
|
};
|
|
|
|
mdio@fd000 {
|
|
interrupts = <101 1 0 0>;
|
|
};
|
|
};
|
|
|
|
L2_1: l2-cache-controller@c20000 {
|
|
/* Cluster 0 L2 cache */
|
|
compatible = "fsl,t2080-l2-cache-controller";
|
|
reg = <0xc20000 0x40000>;
|
|
next-level-cache = <&cpc>;
|
|
interrupts = <16 2 1 9>;
|
|
};
|
|
};
|