443 lines
11 KiB
Plaintext
443 lines
11 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2019 - All Rights Reserved
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* Author: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
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*/
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&m4_rproc {
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m4_system_resources {
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#address-cells = <1>;
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#size-cells = <0>;
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m4_timers2: timer@40000000 {
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compatible = "rproc-srm-dev";
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reg = <0x40000000 0x400>;
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clocks = <&rcc TIM2_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers3: timer@40001000 {
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compatible = "rproc-srm-dev";
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reg = <0x40001000 0x400>;
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clocks = <&rcc TIM3_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers4: timer@40002000 {
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compatible = "rproc-srm-dev";
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reg = <0x40002000 0x400>;
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clocks = <&rcc TIM4_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers5: timer@40003000 {
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compatible = "rproc-srm-dev";
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reg = <0x40003000 0x400>;
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clocks = <&rcc TIM5_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers6: timer@40004000 {
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compatible = "rproc-srm-dev";
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reg = <0x40004000 0x400>;
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clocks = <&rcc TIM6_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers7: timer@40005000 {
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compatible = "rproc-srm-dev";
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reg = <0x40005000 0x400>;
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clocks = <&rcc TIM7_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers12: timer@40006000 {
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compatible = "rproc-srm-dev";
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reg = <0x40006000 0x400>;
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clocks = <&rcc TIM12_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers13: timer@40007000 {
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compatible = "rproc-srm-dev";
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reg = <0x40007000 0x400>;
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clocks = <&rcc TIM13_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers14: timer@40008000 {
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compatible = "rproc-srm-dev";
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reg = <0x40008000 0x400>;
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clocks = <&rcc TIM14_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_lptimer1: timer@40009000 {
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compatible = "rproc-srm-dev";
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reg = <0x40009000 0x400>;
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clocks = <&rcc LPTIM1_K>;
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clock-names = "mux";
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status = "disabled";
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};
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m4_spi2: spi@4000b000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000b000 0x400>;
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clocks = <&rcc SPI2_K>;
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status = "disabled";
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};
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m4_i2s2: audio-controller@4000b000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000b000 0x400>;
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status = "disabled";
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};
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m4_spi3: spi@4000c000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000c000 0x400>;
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clocks = <&rcc SPI3_K>;
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status = "disabled";
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};
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m4_i2s3: audio-controller@4000c000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000c000 0x400>;
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status = "disabled";
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};
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m4_spdifrx: audio-controller@4000d000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000d000 0x400>;
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clocks = <&rcc SPDIF_K>;
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clock-names = "kclk";
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status = "disabled";
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};
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m4_usart2: serial@4000e000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000e000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <27 1>;
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clocks = <&rcc USART2_K>;
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status = "disabled";
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};
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m4_usart3: serial@4000f000 {
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compatible = "rproc-srm-dev";
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reg = <0x4000f000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <28 1>;
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clocks = <&rcc USART3_K>;
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status = "disabled";
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};
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m4_uart4: serial@40010000 {
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compatible = "rproc-srm-dev";
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reg = <0x40010000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <30 1>;
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clocks = <&rcc UART4_K>;
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status = "disabled";
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};
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m4_uart5: serial@40011000 {
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compatible = "rproc-srm-dev";
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reg = <0x40011000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <31 1>;
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clocks = <&rcc UART5_K>;
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status = "disabled";
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};
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m4_i2c1: i2c@40012000 {
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compatible = "rproc-srm-dev";
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reg = <0x40012000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <21 1>;
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clocks = <&rcc I2C1_K>;
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status = "disabled";
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};
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m4_i2c2: i2c@40013000 {
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compatible = "rproc-srm-dev";
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reg = <0x40013000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <22 1>;
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clocks = <&rcc I2C2_K>;
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status = "disabled";
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};
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m4_i2c3: i2c@40014000 {
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compatible = "rproc-srm-dev";
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reg = <0x40014000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <23 1>;
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clocks = <&rcc I2C3_K>;
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status = "disabled";
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};
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m4_i2c5: i2c@40015000 {
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compatible = "rproc-srm-dev";
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reg = <0x40015000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <25 1>;
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clocks = <&rcc I2C5_K>;
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status = "disabled";
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};
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m4_cec: cec@40016000 {
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compatible = "rproc-srm-dev";
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reg = <0x40016000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <69 1>;
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clocks = <&rcc CEC_K>, <&scmi0_clk CK_SCMI0_LSE>;
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clock-names = "cec", "hdmi-cec";
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status = "disabled";
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};
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m4_dac: dac@40017000 {
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compatible = "rproc-srm-dev";
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reg = <0x40017000 0x400>;
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clocks = <&rcc DAC12>;
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clock-names = "pclk";
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status = "disabled";
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};
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m4_uart7: serial@40018000 {
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compatible = "rproc-srm-dev";
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reg = <0x40018000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <32 1>;
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clocks = <&rcc UART7_K>;
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status = "disabled";
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};
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m4_uart8: serial@40019000 {
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compatible = "rproc-srm-dev";
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reg = <0x40019000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <33 1>;
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clocks = <&rcc UART8_K>;
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status = "disabled";
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};
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m4_timers1: timer@44000000 {
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compatible = "rproc-srm-dev";
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reg = <0x44000000 0x400>;
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clocks = <&rcc TIM1_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers8: timer@44001000 {
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compatible = "rproc-srm-dev";
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reg = <0x44001000 0x400>;
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clocks = <&rcc TIM8_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_usart6: serial@44003000 {
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compatible = "rproc-srm-dev";
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reg = <0x44003000 0x400>;
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interrupt-parent = <&exti>;
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interrupts = <29 1>;
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clocks = <&rcc USART6_K>;
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status = "disabled";
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};
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m4_spi1: spi@44004000 {
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compatible = "rproc-srm-dev";
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reg = <0x44004000 0x400>;
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clocks = <&rcc SPI1_K>;
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status = "disabled";
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};
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m4_i2s1: audio-controller@44004000 {
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compatible = "rproc-srm-dev";
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reg = <0x44004000 0x400>;
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status = "disabled";
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};
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m4_spi4: spi@44005000 {
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compatible = "rproc-srm-dev";
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reg = <0x44005000 0x400>;
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clocks = <&rcc SPI4_K>;
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status = "disabled";
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};
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m4_timers15: timer@44006000 {
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compatible = "rproc-srm-dev";
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reg = <0x44006000 0x400>;
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clocks = <&rcc TIM15_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers16: timer@44007000 {
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compatible = "rproc-srm-dev";
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reg = <0x44007000 0x400>;
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clocks = <&rcc TIM16_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_timers17: timer@44008000 {
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compatible = "rproc-srm-dev";
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reg = <0x44008000 0x400>;
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clocks = <&rcc TIM17_K>;
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clock-names = "int";
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status = "disabled";
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};
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m4_spi5: spi@44009000 {
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compatible = "rproc-srm-dev";
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reg = <0x44009000 0x400>;
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clocks = <&rcc SPI5_K>;
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status = "disabled";
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};
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m4_sai1: sai@4400a000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400a000 0x4>;
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clocks = <&rcc SAI1_K>;
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clock-names = "sai_ck";
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status = "disabled";
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};
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m4_sai2: sai@4400b000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400b000 0x4>;
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clocks = <&rcc SAI2_K>;
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clock-names = "sai_ck";
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status = "disabled";
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};
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m4_sai3: sai@4400c000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400c000 0x4>;
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clocks = <&rcc SAI3_K>;
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clock-names = "sai_ck";
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status = "disabled";
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};
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m4_dfsdm: dfsdm@4400d000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400d000 0x800>;
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clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
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clock-names = "dfsdm", "audio";
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status = "disabled";
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};
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m4_m_can1: can@4400e000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400e000 0x400>, <0x44011000 0x2800>;
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clocks = <&scmi0_clk CK_SCMI0_HSE>, <&rcc FDCAN_K>;
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clock-names = "hclk", "cclk";
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status = "disabled";
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};
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m4_m_can2: can@4400f000 {
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compatible = "rproc-srm-dev";
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reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
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clocks = <&scmi0_clk CK_SCMI0_HSE>, <&rcc FDCAN_K>;
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clock-names = "hclk", "cclk";
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status = "disabled";
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};
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m4_dma1: dma@48000000 {
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compatible = "rproc-srm-dev";
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reg = <0x48000000 0x400>;
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clocks = <&rcc DMA1>;
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status = "disabled";
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};
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m4_dma2: dma@48001000 {
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compatible = "rproc-srm-dev";
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reg = <0x48001000 0x400>;
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clocks = <&rcc DMA2>;
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status = "disabled";
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};
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m4_dmamux1: dma-router@48002000 {
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compatible = "rproc-srm-dev";
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reg = <0x48002000 0x1c>;
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clocks = <&rcc DMAMUX>;
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status = "disabled";
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};
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m4_adc: adc@48003000 {
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compatible = "rproc-srm-dev";
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reg = <0x48003000 0x400>;
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clocks = <&rcc ADC12>, <&rcc ADC12_K>;
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clock-names = "bus", "adc";
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status = "disabled";
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};
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m4_sdmmc3: sdmmc@48004000 {
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compatible = "rproc-srm-dev";
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reg = <0x48004000 0x400>, <0x48005000 0x400>;
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clocks = <&rcc SDMMC3_K>;
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status = "disabled";
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};
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m4_usbotg_hs: usb-otg@49000000 {
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compatible = "rproc-srm-dev";
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reg = <0x49000000 0x10000>;
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clocks = <&rcc USBO_K>;
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clock-names = "otg";
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status = "disabled";
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};
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m4_hash2: hash@4c002000 {
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compatible = "rproc-srm-dev";
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reg = <0x4c002000 0x400>;
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clocks = <&rcc HASH2>;
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status = "disabled";
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};
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m4_rng2: rng@4c003000 {
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compatible = "rproc-srm-dev";
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reg = <0x4c003000 0x400>;
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clocks = <&rcc RNG2_K>;
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status = "disabled";
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};
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m4_crc2: crc@4c004000 {
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compatible = "rproc-srm-dev";
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reg = <0x4c004000 0x400>;
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clocks = <&rcc CRC2>;
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status = "disabled";
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};
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m4_cryp2: cryp@4c005000 {
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compatible = "rproc-srm-dev";
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reg = <0x4c005000 0x400>;
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clocks = <&rcc CRYP2>;
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status = "disabled";
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};
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m4_dcmi: dcmi@4c006000 {
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compatible = "rproc-srm-dev";
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reg = <0x4c006000 0x400>;
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clocks = <&rcc DCMI>;
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clock-names = "mclk";
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status = "disabled";
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};
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m4_lptimer2: timer@50021000 {
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compatible = "rproc-srm-dev";
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reg = <0x50021000 0x400>;
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clocks = <&rcc LPTIM2_K>;
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clock-names = "mux";
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status = "disabled";
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};
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m4_lptimer3: timer@50022000 {
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compatible = "rproc-srm-dev";
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reg = <0x50022000 0x400>;
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clocks = <&rcc LPTIM3_K>;
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clock-names = "mux";
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status = "disabled";
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};
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m4_lptimer4: timer@50023000 {
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compatible = "rproc-srm-dev";
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reg = <0x50023000 0x400>;
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clocks = <&rcc LPTIM4_K>;
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clock-names = "mux";
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status = "disabled";
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};
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m4_lptimer5: timer@50024000 {
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compatible = "rproc-srm-dev";
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reg = <0x50024000 0x400>;
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clocks = <&rcc LPTIM5_K>;
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clock-names = "mux";
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status = "disabled";
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};
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m4_sai4: sai@50027000 {
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compatible = "rproc-srm-dev";
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reg = <0x50027000 0x4>;
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clocks = <&rcc SAI4_K>;
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clock-names = "sai_ck";
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status = "disabled";
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};
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m4_qspi: qspi@58003000 {
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compatible = "rproc-srm-dev";
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reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
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clocks = <&rcc QSPI_K>;
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status = "disabled";
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};
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m4_ethernet0: ethernet@5800a000 {
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compatible = "rproc-srm-dev";
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reg = <0x5800a000 0x2000>;
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clock-names = "stmmaceth",
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"mac-clk-tx",
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"mac-clk-rx",
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"ethstp",
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"syscfg-clk";
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clocks = <&rcc ETHMAC>,
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<&rcc ETHTX>,
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<&rcc ETHRX>,
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<&rcc ETHSTP>,
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<&rcc SYSCFG>;
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status = "disabled";
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};
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};
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};
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