158 lines
2.4 KiB
Plaintext
158 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2020 - All Rights Reserved
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* Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
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*/
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/ {
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clocks {
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clk_hse: clk-hse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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clk_hsi: clk-hsi {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <64000000>;
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};
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clk_lse: clk-lse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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clk_lsi: clk-lsi {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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};
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clk_csi: clk-csi {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <4000000>;
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};
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};
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cpus {
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cpu0: cpu@0 {
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clocks = <&rcc CK_MPU>;
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};
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cpu1: cpu@1 {
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clocks = <&rcc CK_MPU>;
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};
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};
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soc {
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m_can1: can@4400e000 {
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clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
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};
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m_can2: can@4400f000 {
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clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
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};
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cryp1: cryp@54001000 {
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clocks = <&rcc CRYP1>;
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resets = <&rcc CRYP1_R>;
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};
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};
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mlahb {
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m4_rproc: m4@10000000 {
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resets = <&rcc MCU_R>;
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m4_system_resources {
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m4_cec: cec@40016000 {
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clocks = <&rcc CEC_K>, <&rcc CK_LSE>;
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};
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m4_m_can1: can@4400e000 {
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clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
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};
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m4_m_can2: can@4400f000 {
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clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
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};
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};
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};
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};
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firmware {
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/delete-node/ scmi-0;
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/delete-node/ scmi-1;
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};
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/delete-node/ sram@2ffff000;
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/delete-node/ mailbox-0;
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/delete-node/ mailbox-1;
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};
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&cec {
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clocks = <&rcc CEC_K>, <&clk_lse>;
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};
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&ddrperfm {
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clocks = <&rcc DDRPERFM>, <&rcc PLL2_R>;
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};
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&dsi {
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clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
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};
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&gpioz {
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clocks = <&rcc GPIOZ>;
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};
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&hash1 {
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clocks = <&rcc HASH1>;
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resets = <&rcc HASH1_R>;
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};
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&i2c4 {
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clocks = <&rcc I2C4_K>;
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resets = <&rcc I2C4_R>;
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};
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&i2c6 {
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clocks = <&rcc I2C6_K>;
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resets = <&rcc I2C6_R>;
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};
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&iwdg2 {
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clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
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};
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&mdma1 {
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clocks = <&rcc MDMA>;
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resets = <&rcc MDMA_R>;
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};
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&rcc {
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compatible = "st,stm32mp1-rcc", "syscon";
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clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>, <&clk_lse>, <&clk_lsi>;
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};
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&rng1 {
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clocks = <&rcc RNG1_K>;
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resets = <&rcc RNG1_R>;
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};
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&rtc {
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clocks = <&rcc RTCAPB>, <&rcc RTC>;
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};
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&spi6 {
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clocks = <&rcc SPI6_K>;
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resets = <&rcc SPI6_R>;
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};
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&usart1 {
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clocks = <&rcc USART1_K>;
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resets = <&rcc USART1_R>;
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};
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